Analyzing security breaches of countermeasures throughout the refinement process in hardware design flow

Danger, Jean‐Luc; Guilley, Sylvain; Nguyen, Philippe; Nguyen, Robert; Souissi, Youssef

doi:10.23919/date.2017.7927159

Cited by 5 publications

(3 citation statements)

References 13 publications

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“…Therefore, any glitch effect shall be easily observable. The tool that we have used for this purpose is the PAVT [21,8,24]. It allows detecting leakages at all levels of the design flow, namely the RTL, Post Synthesis (PS) and layout levels respectively.…”

Section: Side-channel Leakage Detectionmentioning

confidence: 99%

Fault Analysis Assisted by Simulation

Chibani

Facon

Guilley

et al. 2019

Automated Methods in Cryptographic Fault Analysis

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Side-channel and fault injection attacks are renown techniques to extract keys from cryptographic devices. Fortunately, leakage reduction and fault detection countermeasures exist and can be implemented right in the source-code. However, source-code level countermeasures might be altered during the compilation process. Design simulation is an effective means to detect such harmful simplifications. This is a well-known methodology to analyze regressions in terms of side-channel leakage. In this chapter, we explain that protections against fault injection attacks are no exception. First of all, we show that vulnerabilities to those attacks can be easily detected by simulation methods. Second, we highlight that simulation techniques are also highly efficient in detecting logic simplifications which destroy (fully or partly) the countermeasures. Thus, the simulationbased methodology we present in this chapter shows that it is possible to decide quickly which compilation options are safe and which ones are detrimental to the security.

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Section: Side-channel Leakage Detectionmentioning

confidence: 99%

Fault Analysis Assisted by Simulation

Chibani

Facon

Guilley

et al. 2019

Automated Methods in Cryptographic Fault Analysis

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“…4), capacitive coupling such as cross-talk, IR drop, ground/substrate coupling, etc. (refer to [18,Sec. 4.2]); 2.…”

Section: In Both Cases We Haveψ(z)ψ (Z)=0mentioning

confidence: 99%

“…In those two cases, a great care must be taken; tools as that described in [18] can help check the design is secure (or not).…”

Section: (B))mentioning

confidence: 99%

Codes for Side-Channel Attacks and Protections

Guilley

Heuser

Rioul

2017

Codes, Cryptology and Information Security

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Abstract. This article revisits side-channel analysis from the standpoint of coding theory. On the one hand, the attacker is shown to apply an optimal decoding algorithm in order to recover the secret key from the analysis of the side-channel. On the other hand, the side-channel protections are presented as a coding problem where the information is mixed with randomness to weaken as much as possible the sensitive information leaked into the side-channel. Therefore, the field of side-channel analysis is viewed as a struggle between a coder and a decoder. In this paper, we focus on the main results obtained through this analysis. In terms of attacks, we discuss optimal strategy in various practical contexts, such as type of noise, dimensionality of the leakage and of the model, etc. Regarding countermeasures, we give a formal analysis of some masking schemes, including enhancements based on codes contributed via fruitful collaborations with Claude Carlet.

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A pre-silicon logic level security verification flow for higher-order masking schemes against glitches on FPGAs

Tang

et al. 2020

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Analyzing security breaches of countermeasures throughout the refinement process in hardware design flow

Cited by 5 publications

References 13 publications

Fault Analysis Assisted by Simulation

Fault Analysis Assisted by Simulation

Codes for Side-Channel Attacks and Protections

A pre-silicon logic level security verification flow for higher-order masking schemes against glitches on FPGAs

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