Preparation of silicon-on-gallium arsenide wafers for monolithic optoelectronic integration

London, Joanna M.; Loomis, A.H.; Ahadian, J.; Fonstad, C.G.

doi:10.1109/68.775312

Cited by 11 publications

(12 citation statements)

References 3 publications

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“…These Si-on-GaAs (SonG) wafers were shown to be able to withstand temperature cycles to in excess of 700 °C [2], and thus to be suitable for CMOS fabrication using a reduced-temperature SOI process and for epitaxy-onelectronics (EoE) integration of optoelectronic devices using molecular beam epitaxy.…”

Section: Summary Of Most Important Resultsmentioning

confidence: 99%

“…During the course of this two-year program, the first silicon-on-gallium arsenide, SonG, wafers were successfully produced [2]. SIMOX silicon-oninsulator, SOI, wafers were bonded to oxide-coated GaAs wafers and the substrate of the SOI wafer was etched away, leaving a thin, single crystal Si layer intimately bonded to the full-thickness GaAs wafer.…”

Section: Summary Of Most Important Resultsmentioning

confidence: 99%

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Monolithic Integration of Optoelectronic Devices and Si-CMOS on Gallium Arsenide

Fonstad¹

2000

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Public reoonmg ourden for this collection of information ts estimated to average 1 hour per response, including the time tor reviewing instructions, searching existing data sources, gathering and maintaining the data needed, and completing and reviewing the collection of information. During the course of this two-year program, the first silicon-on-gallium arsenide, SonG, wafers were successfully produced. These Si-on-GaAs (SonG) wafers were shown to be able to withstand temperature cycles to in excess of 700°C, and thus to be suitable for CMOS fabrication using a reduced-temperature SOI process and for epitaxy-on-electronics (EoE) integration of optoelectronic devices using molecular beam epitaxy.GaAs-based quantum-well heterostructures with high photoluminescent efficiency and narrow emission line shape were grown by molecular beam epitaxy in windows cut through to the gallium arsenide substrate on SonG wafers, demonstrating the feasibility of doing EoE processing on this foundation. Substantial progress was made before the end of the program in developing techniques to planarize processed CMOS wafers sufficiently for wafer bonding, but the results were not sufficiently developed that reliable bonding of CMOS on GaAs could be demonstrated. This work is continuing with other funding. SUBJECT TERMS

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Section: Summary Of Most Important Resultsmentioning

confidence: 99%

Section: Summary Of Most Important Resultsmentioning

confidence: 99%

Monolithic Integration of Optoelectronic Devices and Si-CMOS on Gallium Arsenide

Fonstad¹

2000

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“…A solution which has recently been proposed to overcome these material roadblocks is the use of silicon-on-gallium arsenide ͑SonG͒ wafers. 1 In this technique separation by implantation of oxygen ͑SIMOX͒ silicon wafers are hydrophilically bonded to GaAs wafers. The bulk of the SIMOX wafer is then removed leaving a thin layer of silicon ͑several hundred angstroms thick͒ bonded to a GaAs wafer through several dielectric layers.…”

Section: Microsystems Technology Laboratory and Department Of Electrimentioning

confidence: 99%

Quantum well heterostructures grown by molecular beam epitaxy on silicon-on-gallium arsenide substrates

London

Postigo

Fonstad

1999

Applied Physics Letters

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“…Unlike the reported [3] use of bonding agents requiring vacuum deposition techniques and hightemperature curing, we used a low-temperature spin-on-glass (SOG) layer, which can be uniformly applied over a wafer by spinning due to its low viscosity. In addition, the described process by London et al [3] results to a thin foil of Si on a GaAs wafer and Si circuits must be processed afterwards.…”

Section: Introductionmentioning

confidence: 99%

“…In addition, the described process by London et al [3] results to a thin foil of Si on a GaAs wafer and Si circuits must be processed afterwards. Our process, on the contrary, results in a thin III-V foil bonded on Si wafer using SOG as the bonding medium.…”

Section: Introductionmentioning

confidence: 99%

Fabrication of GaAs laser diodes on Si using low-temperature bonding of MBE-grown GaAs wafers with Si wafers

Cengher

Hatzopoulos

Gallis

et al. 2003

Journal of Crystal Growth

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We present a study of the properties of III-V structures integrated on Si by low-temperature GaAs-Si wafer bonding, using an intermediate spin-on-glass layer. Transmission electron microscopy revealed the good quality of the bonding and the absence of micro-cracks or dislocations in the semiconductor material. Photoluminescence measurements on GaAs/AlGaAs multiple quantum well structures bonded on Si confirmed that the structural integrity of the quantum wells was preserved during the wafer bonding and thinning process. Photoreflectance measurements at temperatures in the range of 80-300 K showed that the bonded GaAs layers were practically stress free at room temperature, while a tensile stress appeared at lower temperature, due to the different thermal expansion coefficients of GaAs and Si. Laser devices with etched mirrors were fabricated on silicon and exhibited similar performances with reference devices fabricated on a GaAs substrate. r

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Preparation of silicon-on-gallium arsenide wafers for monolithic optoelectronic integration

Cited by 11 publications

References 3 publications

Monolithic Integration of Optoelectronic Devices and Si-CMOS on Gallium Arsenide

Monolithic Integration of Optoelectronic Devices and Si-CMOS on Gallium Arsenide

Quantum well heterostructures grown by molecular beam epitaxy on silicon-on-gallium arsenide substrates

Fabrication of GaAs laser diodes on Si using low-temperature bonding of MBE-grown GaAs wafers with Si wafers

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