Preparation of novel SiGe-free strained Si on insulator substrates

Continuous MOSFET performance increase with device scaling: The role of strain and channel material innovations

“…The on-insulator (''OI'') substrates are generally derived from bulk structures by a combination of epitaxial growth, wafer bonding, and delamination or etch-back methods, which preserve the strain state of the layers. For example, strained silicon directly on insulator (SSDOI), illustrated in Figure 5(e), is derived from biaxial strained Si/relaxed Si 1Àx Ge x by transfer of the epitaxial layers and removal of the relaxed Si 1Àx Ge x virtual substrate, leaving a strained Si layer directly in contact with silicon dioxide [19][20][21]. The on-insulator technologies provide a pathway to implementing mobility enhancement in partially or fully depleted devices, in ultrathin-body MOSFETs, or nonplanar (e.g., doublegate) MOSFETs, and are discussed in the next subsection.…”

Materials and manufacturing techniques for silicon-on-insulator (SOI) wafer technology

“…[95][96][97] Strain as high as 1.3 GPa can routinely be reached, as measured either by XRD 96 or by Raman spectroscopy. 97…”

Wafer bonding in silicon electronics

“…The realization of SSOI wafers from bulk materials is a complex process combining wafer bonding, hydrogeninduced layer transfer, and etch-back methods. Processes using thick SiGe buffer layers were described, for instance, in references [47][48][49], while a process using thin buffer layers was published in Ref. [50].…”