Predictive control for longitudinal beam dynamics in heavy ion synchrotrons

Abstract

Abstract-We present a design of a predictive control scheme for longitudinal beam dynamics in heavy ion synchrotrons. Specifically, we consider a linear-quadratic model predictive control (MPC) approach, whereby the quadratic program is solved via a fast gradient method. Furthermore, we investigate whether the fast gradient method allows for real-time feasible implementation of the proposed approach on a field programmable gate array (FPGA). Our results indicate that sampling rates in the order of 1MHz are achievable.Index Terms-model predictive control, heavy ion synchrotrons, longitudinal beam control, fast gradient method, field programmable gate array

Offset-free output feedback predictive control for longitudinal beam dynamics in heavy ion synchrotrons

“…In particular, the current paper differs from [3] in four important aspects. First, the MPC scheme of [3] assumes full state feedback whereas here we consider the output feedback problem.…”

“…In particular, the current paper differs from [3] in four important aspects. First, the MPC scheme of [3] assumes full state feedback whereas here we consider the output feedback problem. Second, the MPC scheme of [3] assumes the knowledge of a set-point value whereas, in practice, the set-point is unknown a priori.…”

“…In [3] we presented an MPC scheme for stabilisation of the longitudinal beam dynamics in the heavy ion synchrotron SIS18 at the GSI Helmholtz Center for Heavy Ion Research [5]. A Field Programmable Gate Array (FPGA) implementation of this MPC scheme, using a fast gradient method to solve the required optimisation problem, was presented in [3].…”

“…A Field Programmable Gate Array (FPGA) implementation of this MPC scheme, using a fast gradient method to solve the required optimisation problem, was presented in [3]. For implementation on the SIS18 synchrotron, the control action needs to be computed in under 3µs and a timing analysis of the FPGA implementation in [3] showed that, on a high-end FPGA, the optimisation problem could be solved in approximately 1µs.…”

“…The design in [3] ignored certain practical implementation issues and in this paper we address several of these issues. In particular, the current paper differs from [3] in four important aspects.…”