Prediction of long-term immunity of a phase-locked loop

Boyer, Alexandre; Dhia, Sonia Ben; Li, B.; Lemoine, Christophe; Vrignon, B.

doi:10.1109/latw.2011.5985892

Cited by 9 publications

(5 citation statements)

References 9 publications

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“…As presented in only few works, the simulation can be used to predict the long-term EMC behavior. For example, in [2], the simulation results confirm the evolution of the electromagnetic susceptibility (EMS) of a phase-locked loop before and after aging.…”

Section: Introductionmentioning

confidence: 69%

Passive device degradation models for an electromagnetic emission robustness study of a buck DC-DC converter

Huang

Boyer

Dhia

2015

2015 IEEE International Symposium on Electromagnetic Compatibility (EMC)

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Past works showed that the degradation of the passive devices caused by aging could induce failures of electronic system, including a harmful evolution of electromagnetic compatibility. This paper presents the impact of accelerated aging conditions on several typical passive components (capacitor, inductor). The preliminary degradation models of electrolytic capacitor and powder iron inductor are proposed based on experimental results and physical analysis. The overall objective of this study is to predict the evolution of electromagnetic emission level produced by a buck DC-DC converter under a thermal aging, by using these passive device degradation models.

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Section: Introductionmentioning

confidence: 69%

Passive device degradation models for an electromagnetic emission robustness study of a buck DC-DC converter

Huang

Boyer

Dhia

2015

2015 IEEE International Symposium on Electromagnetic Compatibility (EMC)

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“…4a shows the standard DPI test bench setup consisting of the DPI equipments for characterizing the conducted immunity of the DUT. The standard DPI experimental methodology was performed in accordance to the IEC 62132-4 standard [27]. The LabVIEW software, which is integrated with the DPI test bench, has been programmed based on the DPI algorithm to measure and record the relevant DPI power injected (i.e., P inj ) data at different corresponding DPI frequencies.…”

Section: Dpi Test Procedures and Measurement Algorithmmentioning

confidence: 99%

Degradation and Reliability Modeling of EM Robustness of Voltage Regulators Based on ADT: An Approach and a Case Study

Al Rashid,

Koohestani,

Saintis

et al. 2024

IEEE Trans. Device Mater. Relib.

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This paper presents an approach to develop degradation and reliability models of analog integrated circuit (IC) voltage regulators based on the long-term evolution of the electromagnetic compatibility (EMC) performance degradation due to the stress time-dependent accelerated degradation test (ADT). The ADT plan is designed and conducted on six samples of both UA78L05 and L78L05 ICs placed inside a climatic chamber combining both the thermal step-stress (i.e., 70-110 °C) and constant electrical overstress (i.e., 9 and 12 V) conditions for a total stress duration of 950 hours. All the selected UA78L05 and L78L05 samples are subjected to the direct power injection (DPI) measurement test under nominal conditions in order to characterize their immunity to electromagnetic interference (EMI). The statistical degradation data (i.e., the average injected power) of the aged samples is computed across the entire DPI frequency range for a variety of stress time duration. The proposed log-linear accelerated life-stress test (ALT) model is combined with the Weibull unreliability distribution function model to estimate the failure lifetime data against the applied voltage stress at three different failure threshold criterion. At various constant voltage overstress and threshold constraints, the lifetime reliability performance parameters (i.e., time-tofailure, probability of failure, model constants) of the tested device under tests (DUTs) were evaluated based on the measured degradation data. It is demonstrated that, for a limited number of samples under the combined influence of thermal step-stress with voltage overstress conditions, the proposed reliability model predicts with a very acceptable accuracy the lifetime reliability of both UA78L05 and L78L05 tested ICs, developed based on the conducted immunity degradation data. The physics-based modeling approach is utilized to develop the model for the degradation paths based on the observed monotonic degradation of the measured degradation data as well as the conditions of the thermal step-stress ADT. In order to estimate the unknown parameters of the developed degradation model, the maximum likelihood estimation (MLE) method is combined with a genetic optimisation algorithm.

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“…Numerous studies have been leaded these last years to clarify the impact of aging on DSM circuit susceptibility to electromagnetic interferences. Several types of functions have been tested such as digital circuits [7], I/O buffers, phase-locked loop [8], voltage regulator, bandgap voltage reference and operational amplifiers [9] designed in CMOS 0.25 µm, 90 nm, 65 nm. Both positive and negative variations of the susceptibility levels have been measured after aging accelerated by electrical or thermal stresses, depending on the nature and the design of the tested functions.…”

Section: Susceptibilitymentioning

confidence: 99%

A review of research on the effect of aging on the EMC of integrated circuits

Dhia

Boyer

2016

2016 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC)

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Electromagnetic compatibility (EMC) is an essential requirement to electronic systems in which integrated circuits have a major influence. Intrinsic degradation mechanisms, which produces anticipated wear-out in deep submicron components threat not only the reliability of circuits, but also EMC performances. The need to predict and ensure long-term EMC has become a key challenge. This paper aims at presenting the last results on the long-term EMC topic. The paper clarifies the effect of device degradation mechanisms on EMC level drifts during lifetime and presents some attempts to predict these evolutions.

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Prediction of long-term immunity of a phase-locked loop

Cited by 9 publications

References 9 publications

Passive device degradation models for an electromagnetic emission robustness study of a buck DC-DC converter

Passive device degradation models for an electromagnetic emission robustness study of a buck DC-DC converter

Degradation and Reliability Modeling of EM Robustness of Voltage Regulators Based on ADT: An Approach and a Case Study

A review of research on the effect of aging on the EMC of integrated circuits

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