Power supply constraints in megabit DRAMs of the future

Abstract

Megabit DRAM power supply is described in terms of power dissipation, reliability for small transistors, and memory cell operating margin. Such recently developed 1 Mb techniques as CMOS and vertically structured memory cells are discussed. It is concluded that, in spite of CMOS advantage, a transition from the existing supply voltage of 5 V might occur at the 16 Mb level