“…As a result, the estimation is often limited to some heuristic values like the complexity of the topology, e.g., the number of building blocks or loops. For some well-known types of systems, a fitting method can be adopted using a database of completed designs (e.g., ACTIF [94] for estimating the power of analog filters).…”
“…As a result, the estimation is often limited to some heuristic values like the complexity of the topology, e.g., the number of building blocks or loops. For some well-known types of systems, a fitting method can be adopted using a database of completed designs (e.g., ACTIF [94] for estimating the power of analog filters).…”
“…To estimate the values of DAC P and ADC P , we can use the model introduced in [13,14]. Finally, the total energy per bit for a fixed effective rate…”
Section: Energy Efficiency Of Mimo System Modelmentioning
Energy conservation in wireless sensor networks (WSNs) is one of the primary performance parameters. In this paper, an energy-efficient virtual multiple-input multiple-output (MIMO) communication architecture based on distributed source coding (DSC) is proposed for energy-constrained, distributed wireless sensor networks. Low Density Parity Check (LDPC) code is one of the practical codes that can be used for DSC to compress close to Slepian-Wolf limit. Simulation results show that employing DSC by using a LDPC code with length 1000 and compression ratio of R=3/5 in a virtual MIMO-based WSN achieves better energy efficiency compared to that of a virtual MIMO-based communication system without DSC.Index Terms-virtual multiple-input multiple-output (MIMO); wireless sensor network (WSN); distributed source coding (DSC); low density parity check (LDPC).
“…Estimation of the digital comparator array's power have been formulated in [18] and [19]. Comparisons between the two work with published ADCs found [18] to be more accurate for integrated ADCs, and its power estimation formula is:…”
This paper presents the power and performance analysis of a digital, direct sequence ultra-wideband (DS-UWB) receiver operating in the 3 to 4 GHz band. The signal to noise and distortion ratio (SNDR) and bit error rate (BER) were evaluated with varying degrees of front-end linearity and analog to digital converter (ADC) accuracy. The analysis and simulation results indicate two or more ADC bits are required for reliable data reception in the presence of strong interference and intermodulation distortion. In addition to BER performance, power consumption of different hardware configurations is also evaluated to form the cost function for evaluating design choices. The combined power and performance analysis indicates that starting with one-bit ADC resolutions, a substantial gain in reliability can be attained by increasing ADC resolution to two-bits or more. When the ADC resolution improves beyond three bits , front-end linearization achieves similar BER improvements to increasing the ADC accuracy, at a fraction of the power cost. As a result, linear front-end designs become significant only when high precision ADCs are utilized.
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