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2016 IEEE Intl Conference on Computational Science and Engineering (CSE) and IEEE Intl Conference on Embedded and Ubiquitous Co 2016
DOI: 10.1109/cse-euc-dcabes.2016.247
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Power Analysis of Energy Efficient DES Algorithm and Implementation on 28nm FPGA

Abstract: in this work, we have done power analysis of Data Encryption Standard (DES) algorithm using Xilinx ISE software development kit. We have analyzed the amount of power utilized by selective components on board i.e., FPGA Artix-7, where DES algorithm is implemented. The components taken into consideration are clock power, logic power, signals power, IOs power, leakage power and supply power (dynamic and quiescent). We have used four different WLAN frequencies (2.4 GHz, 3.6 GHz, 4.9GHz, and 5.9 GHz) and four diffe… Show more

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Cited by 2 publications
(4 citation statements)
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“…The algorithm expresses a vector w as a combination of the lattice basis vectors, adjusting coefficients to the nearest integers. [3].…”
Section: Bmentioning
confidence: 99%
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“…The algorithm expresses a vector w as a combination of the lattice basis vectors, adjusting coefficients to the nearest integers. [3].…”
Section: Bmentioning
confidence: 99%
“…Approximation Variants: Lattice-based cryptographyintroduces approximation variants denoted by an additional parameter representing the approximation factor. Examples include SVP, where the target is to search and extract a vector v in the lattice such that its Euclidean norm is within a certain factor [11,12].…”
Section: Bmentioning
confidence: 99%
See 2 more Smart Citations