Post-CMOS Processing for High-Aspect-Ratio Integrated Silicon Microstructures

The origin of the loss of Si anisotropy and selectivity to barrier metals during the release etch process of a CMOS-MEMS fabrication flow is investigated experimentally using in situ infrared imaging. The release etch is performed in an inductively coupled plasma etch chamber fitted with a CaF 2 window to maximize IR transmission. Suspended disk test structures of varying plan area, thickness, transverse suspension cross-section and suspension length are etched at various bias voltages using a SF 6 /O 2 /C 4 F 8 time-multiplexed, Bosch-type, anisotropic DRIE process followed by an O 2 polymer removal process and an isotropic SF 6 process. Temperatures up to 150 • C are reported for suspended disk test structures during the isotropic SF 6 process while the temperature rise during the anisotropic DRIE and polymer removal processes is less than 7 • C. A physical model based on the power balance of the suspended disk test structures is developed and used to extract the proportion of etch heat absorbed by the structures, which is determined to be 0.26. The model predicts that exothermic heat of reaction of Si with neutral F species is the dominant source of heat and is supported by the observed temperature trends.

Section: Etch Heating Mechanisms-ion Bombardmentmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

On the origin of selectivity and anisotropy loss during microstructure release etch

Gilgunn¹,

Fedder²

2010

“…Moreover, the study in [7] reports the concept to increase the number of sensing electrodes so as to increase the sensing capacitance of the accelerometer. The designs of capacitive sensing electrodes, such as the gap of gap-closing electrodes [8] and the overlap area of comb-type electrodes [9], etc, are also effective approaches to improve the performance of the capacitive type sensors.…”

Section: Introductionmentioning

confidence: 99%

Design and application of a metal wet-etching post-process for the improvement of CMOS-MEMS capacitive sensors

Tsai

Sun

Liu

et al. 2009

This study presents a process design methodology to improve the performance of a CMOS-MEMS gap-closing capacitive sensor. In addition to the standard CMOS process, the metal wet-etching approach is employed as the post-CMOS process to realize the present design. The dielectric layers of the CMOS process are exploited to form the main micro mechanical structures of the sensor. The metal layers of the CMOS process are used as the sensing electrodes and sacrificial layers. The advantages of the sensor design are as follows:(1) the parasitic capacitance is significantly reduced by the dielectric structure, (2) in-plane and out-of-plane sensing gaps can be reduced to increase the sensitivity, and (3) plate-type instead of comb-type out-of-plane sensing electrodes are available to increase the sensing electrode area. To demonstrate the feasibility of the present design, a three-axis capacitive CMOS-MEMS accelerometers chip is implemented and characterized. Measurements show that the sensitivities of accelerometers reach 11.5 mV G −1 (in the X-, Y-axes) and 7.8 mV G −1 (in the Z-axis), respectively, which are nearly one order larger than existing designs. Moreover, the detection of 10 mG excitation using the three-axis accelerometer is demonstrated for both in-plane and out-of-plane directions.

“…The integration of the standard CMOS process and various CMOS post-processes for MEMS applications have been summarized in [2]. In general, the CMOS post-processes to fabricate suspended MEMS structures can be categorized into three types: (1) front-side bulk Si etching [3,4]; (2) backside bulk Si etching [5]; and (3) surface micromachining by removing sacrificial metal films from the front-side of the Si substrate [6,7]. CMOS MEMS processes have the advantage of monolithic integration of the integrated circuit (IC) and micromechanical components.…”

Section: Introductionmentioning

confidence: 99%

“…The integration of sensors has many applications in the automobile industry, consumer products and various other industries. For instance, the integration of a pressure sensor, temperature sensor and accelerometer is used for a smart tire pressure monitoring system (TPMS) 3,4,5 . The pressure sensor and temperature sensor of the TPMS are respectively employed to detect the tire pressure and temperature in the wheel.…”

Section: Introductionmentioning

confidence: 99%

Monolithic integration of capacitive sensors using a double-side CMOS MEMS post process

Sun

Wang

Tsai

et al. 2008

This study presents a novel double-side CMOS (complementary metal-oxide-semiconductor) post-process to monolithically integrate various capacitance-type CMOS MEMS sensors on a single chip. The CMOS post-process consists of three steps: (1) front-side bulk silicon etching, (2) backside bulk silicon etching and (3) sacrificial surface metal layers etching. Using a TSMC 2P4M CMOS process and the present double-side post-process this study has successfully integrated several types of capacitive transducers and their sensing circuits on a single chip. Monolithic integration of pressure sensors of different sensing ranges and sensitivities, three-axes accelerometers, and a pressure sensor and accelerometer are demonstrated. The measurement results of the pressure sensors show sensitivities ranging from 0.14 mV kPa −1 to 7.87 mV kPa −1. The three-axes accelerometers have a sensitivity of 3.9 mV G −1 in the in-plane direction and 0.9 mV G −1 in the out-of-plane direction; and the accelerated measurement ranges from 0.3 G to 6 G.