Possible benefits of moderate inversion for MOSFET transconductors

Pj, Langlois; Demosthenous, Andreas

doi:10.1109/iscas.2006.1692619

Cited by 2 publications

(4 citation statements)

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“…DISCUSSION Equation (6) predicts one sweet spot for the third harmonic at about and two sweet spots at and for the fourth harmonic. There is reasonable agreement between the analytical and the BSIM model for the location of the sweet spots [10]. At bias voltages above the third harmonic minimum measurements show significant deviations of the third harmonic from the smooth curves predicted by the models.…”

Section: E Measured Spreads In Chipssupporting

confidence: 56%

“…For the squarer application, the %THD is the sum of only the even harmonics referred to the second harmonic. From [10] the main amplitude contribution to the %THD at the minima is from the fifth harmonic for the linear case, and the sixth harmonic for the squarer case.…”

Section: B % Total Hd In Differential Transconductorsmentioning

confidence: 98%

“…In addition, the brief examines the effect of the variations in (including temperature effects) on the location of the sweet spots and demonstrates that this sensitivity can be greatly reduced using the flipped voltage follower [4] as the biasing circuit. The work is a development of [10] and provides measured results based on pairs of matched transistors, which demonstrates the practicality of such transconductors.…”

Section: Introductionmentioning

confidence: 93%

“…In the fourth differential there are two zeros at and . In the third differential there is one zero at [10].…”

Section: Model For Analysismentioning

confidence: 99%

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“Sweet Spots” in Moderate Inversion for MOSFET Squarer Transconductors

Langlois

Demosthenous

2007

IEEE Trans. Circuits Syst. II

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Two "sweet spots" are analytically identified to enable MOSFET squarer differential transconductors to efficiently operate in moderate inversion. Measurements at low frequencies demonstrate the practicality of using moderate inversion when input signals are limited to about 200 mV pk-pk . At the first sweet spot, very low distortion of significantly less than 0.5% total harmonic distortion is possible. For comparison, the sweet spot for the third harmonic is shown for the linear differential transconductor. This brief also discusses the effect of the variations in threshold voltage on the location of the sweet spots, and demonstrates that this sensitivity can be greatly reduced using an appropriate biasing circuit. The proposed approach is of particular interest for low voltage and low current squarer transconductance applications.

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Section: E Measured Spreads In Chipssupporting

confidence: 56%

Section: B % Total Hd In Differential Transconductorsmentioning

confidence: 98%