1993
DOI: 10.1109/5.237538
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Possibilities of deep-submicrometer CMOS for very-high-speed computer logic

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Cited by 20 publications
(2 citation statements)
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“…GENESYS extends the capabilities of previous system-level performance simulators [7], [22], [23], allowing a more thorough exploration of the entire hierarchy of physical and practical limits. While other simulators focus exclusively on interconnect technology [24], GENESYS describes the complete chip design for a more realistic investigation.…”
Section: Related Workmentioning
confidence: 99%
“…GENESYS extends the capabilities of previous system-level performance simulators [7], [22], [23], allowing a more thorough exploration of the entire hierarchy of physical and practical limits. While other simulators focus exclusively on interconnect technology [24], GENESYS describes the complete chip design for a more realistic investigation.…”
Section: Related Workmentioning
confidence: 99%
“…20 the system switching energy limit is defined by a composite gate which characterizes the critical path of a macrocell. For a logic signal this path is assumed to consist of 1) a chain of n cp random logic gates and 2) one macrocell corner-to-corner global interconnect of length 2L [56], [57]. Therefore, the prorata switching energy of the composite gate is given by…”
Section: E System Limitsmentioning
confidence: 99%