Plastic Deformation in Central Regions of Epitaxial Silicon Slices

Dyer, Lawrence D.; Huff, Howard R.; Boyd, W. W.

doi:10.1063/1.1659999

Cited by 20 publications

(10 citation statements)

References 8 publications

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“…164,167 This was interpreted as a result of the entrapment of a hot region within a colder annular zone in a concave shaped wafer. 164,167,194 Further examination of the front-and back-surface of the wafer indicated that dislocations moved out of the wafer and preferentially piled up on the front ͑i.e., concave͒ shaped wafer surface or near the periphery area due to its larger ͑compressive͒ stress compared to the convex surface. 164,167,194 This observation was clarified via a detailed study of the warpage of silicon wafers, induced by oxygen precipitation in wafers processed in furnaces, without the complication of a back-surface epitaxial susceptor contact.…”

Section: Wafer Mechanicsmentioning

confidence: 99%

“…14͒ and their colleagues. 164,167 Excessive oxygen precipitation can also preclude effective lithographic printing due to uncontrolled wafer warpage as shown by Hirofumi Shimizu and colleagues. 168,169 The increased ultilization of rapid thermal annealing ͑RTA͒ requires attentiveness to minimize global alignment errors as well as to monitor warpage so as to minimize global alignment errors in lithography.…”

mentioning

confidence: 99%

“…[191][192][193] In light of these developments to control plastic deformation, the experimental observation by Leroy, Huff, and Dyer and their colleagues that plastic deformation could also occur in the central regions of epitaxial wafers, where no macroscopic radial gradient existed, was quite interesting. 164,167 This was interpreted as a result of the entrapment of a hot region within a colder annular zone in a concave shaped wafer. 164,167,194 Further examination of the front-and back-surface of the wafer indicated that dislocations moved out of the wafer and preferentially piled up on the front ͑i.e., concave͒ shaped wafer surface or near the periphery area due to its larger ͑compressive͒ stress compared to the convex surface.…”

mentioning

confidence: 99%

“…164,167,194 Further examination of the front-and back-surface of the wafer indicated that dislocations moved out of the wafer and preferentially piled up on the front ͑i.e., concave͒ shaped wafer surface or near the periphery area due to its larger ͑compressive͒ stress compared to the convex surface. 164,167,194 This observation was clarified via a detailed study of the warpage of silicon wafers, induced by oxygen precipitation in wafers processed in furnaces, without the complication of a back-surface epitaxial susceptor contact. 164 The mechanical properties of silicon, including studies on the change in wafer shape due to process-induced warpage during wafer heating and cooling ͑observed to initiate at the wafer periphery and center, respectively͒, were summarized in the classic article by Shinichiro Takasu ͑Fig.…”

mentioning

confidence: 99%

“…The combined influence of thermal and gravitational stresses for 300 mm diam wafers has been extensively discussed in the 1990s and, at this time, the engineering design issues have been shown to be solvable by Huff and Randal Goodall in conjunction with Robert Nilson and Stuart Griffiths as well as by Shimizu and colleagues. 1,160,165,186 -188 The mathematical formulation describing the thermal stress in silicon wafers during epitaxial deposition was initiated by Howard Huff and colleagues 167,189 and extended by Jan Bloem and colleagues. 190 Significant improvements in epitaxial process technologies were subsequently described by Mac Robinson, Jon Rossi, Rick Wise, and their colleagues.…”

mentioning

confidence: 99%

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An Electronics Division Retrospective (1952-2002) and Future Opportunities in the Twenty-First Century

Huff¹

2002

J. Electrochem. Soc.

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The emergence of crystalline silicon and silicon-based materials such as silicon-germanium as the premier materials and the personnel driving the integrated circuit ͑IC͒ microelectronics revolution will be reviewed. The major threshold events from the 1940s through the mid-1960s, presaging the onset of the large scale integration microelectronics era, will be highlighted. The major silicon material challenges such as dislocation-free single-crystal growth, plastic deformation, the point-defect dilemma, gettering, oxygen in silicon, carrier lifetime, and controlled point-defects in the silicon crystal during the evolution of silicon microelectronics from large scale integration through the very large scale integration era in the 1970s and the 1980s into the ultralarge scale integration era of the 1990s will then be reviewed. Opportunities in epitaxy, wafer cleaning, silicon-on-insulator, silicon-germanium, IC scaling and potential changes in device configuration and IC architecture in the evolution towards the 64 Gbit DRAM and 9 G transistor high-performance MPU logic era in 2016 ͑per the 2001 edition of the International Technology Roadmap for Semiconductors͒ will be discussed in the context of silicon-based microelectronics. The complementary role of compound semiconductors, nanoelectronics and the continuing initiative to obtain an optoelectronic system compatible with silicon will also be discussed. Finally, nonsilicon materials and device configurations will briefly be noted. © 2002 The Electrochemical Society. ͓DOI: 10.1149/1.1471893͔ All rights reserved.Available electronicallyApril 11, 2002. The computer and communications age has catapulted electronics to its current status as the dominant global industry. Indeed, we are in the midst of a revolution brought about by the availability of inexpensive information acquisition, manipulation, and distribution systems. Exploitation of electron and hole conduction in silicon has resulted in electronic memory and logic circuits such as the dynamic random access memory ͑DRAM͒ and microprocessor. Control of the interaction of photons with compound semiconductors has resulted in optical devices such as the laser and optical fiber networks. This revolution has been and will continue to be dependent on our ability to control electronic and photonic material processing techniques for the manufacture of useful devices, circuits and systems. The preparation and detailed processing sequence of a material from crystal growth through device and circuit fabrication determines the microstructure and, therefore, the electronic properties of the material and resulting device and circuit performance, yield, and reliability. Electronic materials include semiconductors, dielectrics, magnetics, piezoelectrics, optoelectronic materials, and optical fibers which may be utilized in crystalline, polycrystalline, or amorphous form. Materials are indeed the sine qua non of electronic and optical devices and circuits.An extensive list of relevant citations through 1997 is noted in Ref. ...

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