2006
DOI: 10.1109/led.2006.886327
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Plasma-Induced Damage in High-$k$/Metal Gate Stack Dry Etch

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Cited by 20 publications
(8 citation statements)
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“…The thermal ALE approach avoids any damage to the underlying substrate resulting from high energy ions or energetic neutrals. Ions from plasmas have been implicated in the performance degradation of high-k/metal gate stacks . Using neutral noble gas beams is able to mitigate the structural and electrical damage caused by ions …”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…The thermal ALE approach avoids any damage to the underlying substrate resulting from high energy ions or energetic neutrals. Ions from plasmas have been implicated in the performance degradation of high-k/metal gate stacks . Using neutral noble gas beams is able to mitigate the structural and electrical damage caused by ions …”
Section: Resultsmentioning
confidence: 99%
“…Ions from plasmas have been implicated in the performance degradation of high-k/ metal gate stacks. 42 Using neutral noble gas beams is able to mitigate the structural and electrical damage caused by ions. 8 ALE based on ion or neutral noble atom bombardment also requires line-of-sight to the substrate.…”
Section: Resultsmentioning
confidence: 99%
“…The thermal ALEt approach avoids any damage to the underlying substrate resulting from high energy ions or energetic neutrals. 59 ALEt based on ion or neutral noble atom bombardment requires line-of-sight to the substrate. This requirement can be used advantageously to minimize undercutting with directional ions or energetic neutral atoms during ALEt.…”
Section: Extensions To Other Materials and Advantages Of Thermal Alet-mentioning
confidence: 99%
“…Therefore, in the gate dielectric etch processing of nanoscale MOSFET devices, precise control of the etch rate (depth) has become a greater prerequisite than achieving a high etch rate due to the extreme thinness of the gate dielectric material. In addition, the etched surface and the gate dielectric material must remain undamaged for the gate dielectric processing of nanoscale devices [7,8]. However, conventional RIE tends to cause electrical and physical damage to the surface of the devices due to use of energetic reactive ions and the difficulty in the precise etch rate (depth) control at an atomic scale.…”
Section: Introductionmentioning
confidence: 99%