Plasma etching of high aspect ratio features in SiO2 using Ar/C4F8/O2 mixtures: A computational investigation

Abstract

Plasma etching of high aspect ratio (HAR) features, typically vias, is a critical step in the fabrication of high capacity memory. With aspect ratios (ARs) exceeding 50 (and approaching 100), maintaining critical dimensions (CDs) while eliminating or diminishing twisting, contact-edge-roughening, and aspect ratio dependent etching (ARDE) becomes challenging. Integrated reactor and feature scale modeling was used to investigate the etching of HAR features in SiO 2 with ARs up to 80 using tri-frequency capacitively coupled plasmas sustained in Ar/C 4 F 8 /O 2 mixtures. In these systems, the fluxes of neutral radicals to the wafer exceed the fluxes of ions by 1-2 orders of magnitude due to lower threshold energies for dissociation compared with ionization. At low ARs (<5), these abundant fluxes of CF x and C x F y radicals to the etch front passivate the oxide to form a complex which is then removed by energetic species (ions and hot neutrals) through chemically enhanced reactive etching, resulting in the formation of gas phase SiF x , CO x , and COF. As the etching proceeds into higher ARs, the fractional contribution of physical sputtering to oxide removal increases as the fluxes of energetic species to the etch front surpass those of the conduction constrained CF x and C x F y radicals. The instantaneous etch rate of oxide decreases with increasing aspect ratio (ARDE effect) due to decreased fluxes of energetic species and decreased power delivered by these species to the etch front. As the etch rate of photoresist (PR) is independent of AR, maintaining CDs by avoiding undercut and bowing requires high SiO 2-over-PR selectivity, which in turn requires a minimum thickness of the PR at the end of etching. Positive ions with narrow angular distributions typically deposit charge on the bottom of low AR features, producing a maximum in positive electric potential on the bottom of the feature. For high AR features, grazing incidence collisions of ions on sidewalls depositing charge produce electric potentials with maxima on the sidewalls (as opposed to the bottom) of the feature.

Investigation of SiO2 Etch Characteristics by C6F6/Ar/O2 Plasmas Generated Using Inductively Coupled Plasma and Capacitively Coupled Plasma

“…As the semiconductor device size has decreased to nanoscale due to the high integration of the circuit, the critical dimension has decreased to a few nanometers and the device structure has changed from 2D to 3D. To fabricate these devices, etching technologies such as pulsed plasma etching technology and multiple patterning technology are widely investigated [1][2][3][4][5][6][7][8][9] and applied using two different plasma etching systems, namely the capacitively coupled plasma (CCP) etching system and inductively coupled plasma (ICP) etching system.…”

Low-Energy Electron Scattering from c-C4F8

“…In particular, Rauf and Balakrishna conducted two-dimensional simulations in a fluorocarbon mixture capacitively coupled plasma (CCP) discharge and calculated the oxide etch rate on various operation conditions [7]. Moreover, Huang et al conducted both reactor and feature profile simulations in Ar/C 4 F 8 /O 2 CCP discharges [8]. Although many reactions are considered in simulations, several reaction rate coefficients are still assumed, and some electron collision reactions were neglected.…”

Characterization of SiO2 Etching Profiles in Pulse-Modulated Capacitively Coupled Plasmas

“…As the feature size of semiconductors continues to decrease, and the structure of semiconductors is altered from two to three dimensions, high-aspect-ratio contact (HARC) hole etching has emerged as one of the most important goals in the semiconductor manufacturing process. Achieving high-performance HARC hole etching requires high selectivity [1][2][3][4][5][6][7], anisotropic etching [8][9][10][11][12], and reduced charge damage [13][14][15][16]. As continuous wave (CW) plasma reacts with a consistent ion flux on a wafer surface, it is difficult to attain these aspects with CW plasma.…”