2014 15th International Conference on Electronic Packaging Technology 2014
DOI: 10.1109/icept.2014.6922673
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Plasma cleaning and its application in microwave module wire bonding technology

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Cited by 4 publications
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“…Advanced FinFET logic processes have become more complex for realizing more tightly packed transistors in multi-functional and more powerful Si chips. Reactive ion etching steps enhanced by plasma [4,5] become inevitable in advanced nano-scale processes for achieving high aspect ratio structures which are essential for high packing density circuits [6]. For CMOS technology nodes beyond 45 nm, the transistor gates changed from the conventional poly-silicon gate with silicon dioxide to high-k metal gate stacks [7,8].…”
Section: Introductionmentioning
confidence: 99%
“…Advanced FinFET logic processes have become more complex for realizing more tightly packed transistors in multi-functional and more powerful Si chips. Reactive ion etching steps enhanced by plasma [4,5] become inevitable in advanced nano-scale processes for achieving high aspect ratio structures which are essential for high packing density circuits [6]. For CMOS technology nodes beyond 45 nm, the transistor gates changed from the conventional poly-silicon gate with silicon dioxide to high-k metal gate stacks [7,8].…”
Section: Introductionmentioning
confidence: 99%
“…Advanced FinFET logic processes has become more complex for realizing more tightly packed transistors in multi-functional and more powerful Si chips. Reactive ion etching steps enhanced by plasma [4][5] become inevitable in advanced nano-scale processes for achieving high aspect ratio structures which are essential for high packing density circuits [6]. For CMOS technology nodes beyond 45nm, the transistor gates changed from the conventional poly-silicon gate with silicon dioxide to high-k metal gate stacks [7][8].…”
Section: Introductionmentioning
confidence: 99%