Piezoresistance in Strained Silicon and Strained Silicon Germanium

Abstract

This paper presents experimental results of the piezoresistance in p-type tensile strained silicon and compressive strained silicon germanium grown by molecular beam epitaxy (MBE) on (001) silicon substrates. The piezoresistance decreases in a tensile strained layer and increases in a compressive strained layer when compared to the unstrained material. The results show that one can tune the piezoresistance by tuning the strain in the piezoresistor and thus tailor the performance of the device. The obtained results show an increase in the piezoresistance effect of 35% in compressive strained silicon germanium and a decrease in the piezoresistance effect in tensile strained silicon of 24%. Furthermore, the results show that the piezoresistance of a tensile strained silicon crystal has a smaller temperature dependency compared to that of unstrained silicon. The piezoresistance effect decreases by 7% in tensile strained silicon compared to the piezoresistance effect decrease in silicon of 18% when changing the temperature from 30 o C to 80 o C.Mater. Res. Soc. Symp. Proc. Vol. 958

Piezoresistive effect in top-down fabricated silicon nanowires

“…half the thickness), w is the width and t is the thickness [5]. The bending fixture is located in an aluminum box with built-in resistive heating.…”

Strain effect on mobility in nanowire MOSFETs down to 10nm width: Geometrical effects and piezoresistive model

“…The piezoresistivity theory provides a simple description of the effect of strain on transport properties of transistors through the use of piezoresistive coefficients (PR), which relate the change of mobility to the strain in the channel [6], [7]. A large collection of piezoresistance coefficients has already been published for MOSFETs with different channel materials (Si, Ge, SiGe, ...) [8], [9], inversion surface orientations ((110), (111), (100) for Si and SiGe [10], [11]) or channel crystallographic orientations [12]. Up to now, only a few data are available for multiple gate MOSFETs [13]- [17], for which the impact of scaled dimensions down to ≈10nm can play a significant role.…”

Four point bending setup for characterization of semiconductor piezoresistance

“…8,[15][16][17][18][19] In Refs. 16 and 18 an optical method is used to measure the deflection and curvature of the chip.…”

“…The main focus is to characterize the piezoresistivity of p-type silicon and other related semiconductor materials, e.g., Si under tensile strain 19 and compressively strained SiGe. 8 In this paper, we present measurements of the piezocoefficient 44 in p-type silicon with several different doping concentrations in the temperature range T = 30-80°C as an example of use of the setup.…”