Physics-Based Circuit-Compatible SPICE Model for Ferroelectric Transistors

Aziz, Ahmedullah; Ghosh, S. K.; Datta, Suman; Gupta, Sumeet Kumar

doi:10.1109/led.2016.2558149

Cited by 127 publications

(62 citation statements)

References 11 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Single domains are simulated by a Schmitt trigger [Sun05, Yamamoto] and voltage controlled capacitor and resistor [115,116]. Finally physics-based models are based on the LK-equation [117,118,119,121] or the KAI-model [120]. The non-linearity of the ferroelectric is either reproduced abstractly by controlled current and voltage sources [117] or, more circuitry-wise, by a series connection of a non-linear capacitor C N and a resistor R N with a linear capacitor C 0 in parallel [118,120,119].…”

Section: Circuit Model Of Ferroelectric Devicesmentioning

confidence: 99%

“…The Model of the ferroelectric material described in the following (Figure 21) is based on the approach of Aziz et al [118] who made use of the LK-equation (Eq. The first term corresponds to a series resistor with the resistance R N =T FE· ρ/A FE and the following terms reflect the non-linearity of the ferroelectric capacitor.…”

Section: Circuit Model Of Ferroelectric Devicesmentioning

confidence: 99%

See 1 more Smart Citation

A computational study of hafnia-based ferroelectric memories: from ab initio via physical modeling to circuit models of ferroelectric device

et al. 2017

View full text Add to dashboard Cite

Abstract. The discovery of ferroelectric properties of binary oxides revitalized the interest in ferroelectrics and bridged the scaling gap between the state-of-the-art semiconductor technology and ferroelectric memories. However, before hitting the markets, the origin of ferroelectricity and in-depth studies of device characteristics are needed. Establishing a correlation between the performance of the device and underlying physical mechanisms is the first step toward understanding the device and engineering guidelines for a novel, superior device. Therefore, in this paper a holistic modeling approaches which lead to a better understanding of ferroelectric memories based on hafnium and zirconium oxide is addressed. Starting from describing the stabilization of the ferroelectric phase within the binary oxides via physical modeling the physical mechanisms of the ferroelectric devices are reviewed. Besides, limitations and modeling of the multi-level operation and switching kinetics of ultimately scaled devices as well as the necessity for Landau-Khalatnikov approach are discussed. Furthermore, a device level model of ferroelectric memory devices that can be used to study the array implementation and their operational schemes are addressed. Finally, a circuit model of the ferroelectric memory device is presented and potential further applications of ferroelectric devices are outlined.

show abstract

Section: Circuit Model Of Ferroelectric Devicesmentioning

confidence: 99%

Section: Circuit Model Of Ferroelectric Devicesmentioning

confidence: 99%

A computational study of hafnia-based ferroelectric memories: from ab initio via physical modeling to circuit models of ferroelectric device

et al. 2017

View full text Add to dashboard Cite

show abstract

“…[22] NCFET simulation methods vary according to the types of transistor gate structures-metal ferroelectric semiconductor field-effect transistor (MFSFET), metal ferroelectric insulator semiconductor field-effect transistor (MFISFET), and metal ferroelectric metal insulator semiconductor field-effect transistor (MFMISFET). However, the basic principle is to realize a match between the channel charge Q and the ferroelectric polarization charge P, [38][39][40][41][42] no matter what the specific gate structure is.Furthermore, the influencing factors of NCFET's electrical properties have been qualitatively analyzed and summarized according to numerous simulation results. Commonly, a tradeoff exists between SS and hysteresis, [22] and we can design and manipulate the gate structure, [41] ferroelectric thickness (t Fe ), [22] ferroelectric material parameters, [38] silicon doping concentration, [39,43] temperature, [44] work frequency, [45][46][47][48] and high-κ dielectric [23,49,50] to optimize the electrical performance of NCFET and meet specific practical application requirement.…”

mentioning

confidence: 99%

Ferroelectric Negative Capacitance Field Effect Transistor

Wang

et al. 2018

Adv Elect Materials

115

View full text Add to dashboard Cite

such as steep subthreshold swing (SS), high switching ratio (I on /I off ), adjustable hysteresis, compatibility with standard semiconductor fabrication processes, and environmental friendliness, promotes NCFET to be a promising candidate to lower power consumption and solve the heat problem in ULSI.As early as the 1960s, the concept of negative capacitance (NC) was proposed in amorphous semiconductor chalcogenides thin film, [25,26] then the NC effect was observed in several devices, such as p-n junctions, [27,28] Schottky diodes, [29,30] metal-insulator-metal diodes, [31] and others. [32][33][34][35] Concretely, the NC effect occurs when the reciprocal of the second derivation of potential energy U with respect to the ferroelectric polarization charge Q F is negative, which is usually achieved during the switching process of ferroelectric polarization. [36,37] NCFET achieves steep SS through the NC voltage amplification effect by adding a ferroelectric layer into the transistor gate stack. [22] NCFET simulation methods vary according to the types of transistor gate structures-metal ferroelectric semiconductor field-effect transistor (MFSFET), metal ferroelectric insulator semiconductor field-effect transistor (MFISFET), and metal ferroelectric metal insulator semiconductor field-effect transistor (MFMISFET). However, the basic principle is to realize a match between the channel charge Q and the ferroelectric polarization charge P, [38][39][40][41][42] no matter what the specific gate structure is.Furthermore, the influencing factors of NCFET's electrical properties have been qualitatively analyzed and summarized according to numerous simulation results. Commonly, a tradeoff exists between SS and hysteresis, [22] and we can design and manipulate the gate structure, [41] ferroelectric thickness (t Fe ), [22] ferroelectric material parameters, [38] silicon doping concentration, [39,43] temperature, [44] work frequency, [45][46][47][48] and high-κ dielectric [23,49,50] to optimize the electrical performance of NCFET and meet specific practical application requirement.The experimental researches on NCFETs can be mainly classified into three categories based on various kinds of ferroelectrics. First, the NCFET based on organic ferroelectric-poly(vinylidene difluoride-trifluoroethylene)[P(VDF-TrFE)], has been experimentally demonstrated, and achieves minimum SS (SS min ) = 13 mV dec −1 with small hysteresis. [51,52] Second, the NCFET based on lead zirconate titanate (PZT), a type of inorganic perovskite-type ferroelectric, exhibits hysteretic switching with With the progress in silicon circuit miniaturization, lowering power consumption becomes the major objective. Supply voltage scaling in ultralargescale integration (ULSI) is limited by the physical barrier termed "Boltzmann Tyranny." Moreover, considerable heat is inevitably generated from the ultrahighly integrated circuit. To solve these problems, a ferroelectric negative capacitance field-effect transistor (Fe-NCFET) is proposed in order to reduce the subthresho...

show abstract

“…To evaluate the proposed designs, we employ a SPICE model for FEFETs based on time-dependent Landau Khalatnikov (LK) equations coupled with predictive technology models for the transistor [12]. We perform our analysis for 10nm FinFETs showing the applications of the proposed techniques in scaled technologies.…”

Section: Modeling and Calibrationmentioning

confidence: 99%

“…FEFETs are emerging devices [9,12], in which FE is integrated in the gate stack of a transistor above the dielectric (DE). An optional metal may also be used in between FE and DE layers.…”

Section: Fefet Backgroundmentioning

confidence: 99%

Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems

Thirumala

Raha

Jayakumar

et al. 2018

Proceedings of the International Symposium on Low Power Electronics and Design

View full text Add to dashboard Cite

In this work, we propose dual mode ferroelectric transistors (D-FEFETs) that exhibit dynamic tuning of operation between volatile and non-volatile modes with the help of a control signal. We utilize the unique features of D-FEFET to design two variants of non-volatile flip-flops (NVFFs). In both designs, D-FEFETs are operated in the volatile mode for normal operations and in the non-volatile mode to backup the state of the flip-flop during a power outage. The first design comprises of a truly embedded non-volatile element (D-FEFET) which enables a fully automatic backup operation. In the second design, we introduce need-based backup, which lowers energy during normal operation at the cost of area with respect to the first design. Compared to a previously proposed FEFET based NVFF, the first design achieves 19% area reduction along with 96% lower backup energy and 9% lower restore energy, but at 14%-35% larger operation energy. The second design shows 11% lower area, 21% lower backup energy, 16% decrease in backup delay and similar operation energy but with a penalty of 17% and 19% in the restore energy and delay, respectively. System-level analysis of the proposed NVFFs in context of a state-of-the-art intermittently-powered system using real benchmarks yielded 5%-33% energy savings. CCS ConceptsHardware➝ Emerging Technologies ➝Analysis and design of emerging devices and systems.

show abstract

Physics-Based Circuit-Compatible SPICE Model for Ferroelectric Transistors

Cited by 127 publications

References 11 publications

A computational study of hafnia-based ferroelectric memories: from ab initio via physical modeling to circuit models of ferroelectric device

A computational study of hafnia-based ferroelectric memories: from ab initio via physical modeling to circuit models of ferroelectric device

Ferroelectric Negative Capacitance Field Effect Transistor

Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems

Contact Info

Product

Resources

About