Physical Analysis of Damage Sites Introduced by SEGR in Silicon Vertical Power MOSFETs and Implications for Postirradiation Gate-Stress Test

Neutron-Induced Failure Dependence on Reverse Gate Voltage for SiC Power MOSFETs in Atmospheric Environment

“…For that purpose, we created a simulation model, in which the gate damage is modeled by replacing a small portion of the gate oxide with SiC material. Based on a recent publication for Si MOSFET [27], in our case we simulated the damage sites by creating a SiC path through the gate oxide layer just on the top of the source well (Fig. 12) which corresponds to the current behavior observed during PIGS test.…”

Optimization of the Cell Structure for Radiation-Hardened Power MOSFETs

“…However, they are vulnerable to particle from galactic cosmic rays, solar flares, and radiation belts, which may cause total ionizing dose effects, single event gate rupture (SEGR) effects and single event burnout (SEB) effects [2,3]. There has been a substantial research on such radiation effects [4][5][6][7], whereas radiation hardening on power MOSFETs, the more necessary resolve, has only been discussed in a few articles [8][9][10][11][12] whose content mostly focused on a single hardening issue, such as SEB, SEGR, and TID. Apparently, these radiation effects, along with electrical performance, are essential considerations during the design and fabrication stage of a power MOSFET; moreover, many trade-offs should be decided when balancing between several electrical parameters and radiation survivability.…”