Photoluminescence From Oxidized Macroporous Silicon: Nanoripples and Strained Silicon Nanostructures

Ray, Mallar; Jana, Arpita; Ghanta, Ujjwal; Bandyopadhyay, Nil Ratan; Hossain, Syed Minhaz

doi:10.1109/tdmr.2012.2214781

Cited by 8 publications

(6 citation statements)

References 31 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The presence of Si-H x and O-SiH x bonds have been indicated by the peak near 800 cm −1 to 880 cm −1 region [24,25,44]. Peaks near 610 cm −1 corresponds to Si-H bonds [40][41][42]. All these peak positions and their interpretations have been summarized in table 4 along with a comparative analysis of the bonds present in the three layers.…”

Section: Resultsmentioning

confidence: 98%

“…The exact mechanism behind the luminescence properties of the nanocrystals is not conclusively understood till date [25,[36][37][38][39]. There are several conflicting proposals, among which two main governing factors, quantum confinement and oxide related surface/interface states, are considered to control the luminescence from silicon nanocrystals [28,[40][41][42]. But quantitative measurements of individual contributions from the two factors cannot be particularly documented [27,42].…”

Section: Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Negative differential resistance in Si nanostructure: role of interface traps

Chakrabarty

Hossain

2023

Phys. Scr.

Self Cite

View full text Add to dashboard Cite

Negative differential resistance (NDR) has been observed in I-V characteristics measured between two aluminum (Al) pads deposited on a layer containing Silicon nanostructures. This feature has been observed for suitable bias range and specific direction of voltage sweep NDR. has been found to show up within a specific range of lower and upper threshold voltages for each of the samples studied in this work. The amount of NDR has been found to depend on voltage scan rate and bias range. The observed phenomena have been explained using the dynamics of charge trapping and detrapping at the surface/interface defect states present at the boundary of the nanostructured silicon and the oxide layer. An equivalent circuit designed by incorporation of suitable resistance and capacitance representing the trap assisted charge transport within the aluminum-Silicon nanostructure junctions produced similar I-V characteristics as obtained in the experimental results. Repeatability of NDR shows the potential of the device to be used in oscillators.

show abstract

Section: Resultsmentioning

confidence: 98%

Section: Resultsmentioning

confidence: 99%

Negative differential resistance in Si nanostructure: role of interface traps

Chakrabarty

Hossain

2023

Phys. Scr.

Self Cite

View full text Add to dashboard Cite

show abstract

“…PL from SiNCs is still a dynamic research topic from the time when luminescent properties of porous Si has been observed in 1990 by Canham [1], however, the exact mechanism behind the luminescence from these nanocrystals is not conclusively explained till date [26,[32][33][34][35]. Among few conflicting proposals, it is now largely accepted that the two main controlling/contributing factors, quantum confinement and oxide related surface/interface states are responsible for the luminescence properties of SiNCs [8,10,[36][37][38], though quantitative contributions from these two factors cannot be identified separately. As a consequence, PL measurements cannot estimate the average electronic band gap or crystallite size of the nanostructures.…”

Section: Resultsmentioning

confidence: 99%

Origin of photo-enhanced hysteretic electrical conductance in nanostructured silicon-based heterojunction

Chakrabarty¹,

Das²,

Hossain³

2022

J. Phys. D: Appl. Phys.

View full text Add to dashboard Cite

Photo-enhanced hysteretic I-V curves have been observed under reverse bias in a p-i-n structure containing electrochemically etched nanostructured silicon (Si) sandwiched between p-Si and n-type a-Si:H layers. These curves have been found to depend on intensity of incident illumination and structural morphology of the nanostructured Si layer. The conductance in trace path is lower than that in retrace path. Charge transport mechanism in this structure has been interpreted using microscopic description of charge trapping and detrapping in the defect states present at the interface of nanocrystalline silicon core and oxide shell in the active layer. An applied voltage dependent probability distribution of trapping and detrapping has been calculated in light of classical random walk problem. The trapping/detrapping of charges leading to development/destruction of potential barriers in the path of charge flow shows an analogy with the river bed deposition/erosion. The rate of trapping has been considered to depend on the empty defect states whereas the rate of detrapping depends on the already filled defects. Moreover, the rate of both trapping and detrapping is expected to depend on the charge flow rate. All these considerations lead the I-V relations for trace and retrace paths in reverse bias fitting nicely with experimental I-V loops. The observed peaks in the voltage dependent dynamic conductance in trace and retrace paths have been explained as a consequence of development and destruction of two barriers in the active layer for electrons and holes separately. Best fit values of the fitting parameters indicates that the trace path is dominated by holes whereas the retrace path is dominated by electronic transport. The difference in mobility of electron and hole leads to different trapping and detrapping rates in the two paths resulting in the observed hysteresis.

show abstract

“…Recently, strained-Silicon technology has been explored abundantly in an effort to increase CMOS based device performance [6][7][8][9][10]. The mobility advantage the strain offers at no significant additional processing cost makes it an ideal candidate among conventional Silicon devices for performance enhancement.…”

Section: Review Of Previous Workmentioning

confidence: 99%

Investigation of Carrier Mobility Degradation Effects on Mosfet Leakage Simulations

Twala¹

2016

IJC

View full text Add to dashboard Cite

The term carrier mobility generally alludes to both electron and hole mobility in semiconductors. These parameters characterize how quickly an electron and/or hole moves through a metal or semiconductor when under the influence of an electric field. Most studied mobility models only take into account the influence of temperature and doping concentration which provides less accurate but faster simulation and allows preliminary device description adjustments and analysis. However complete models, like Klaassen, Shirahata or some allowed model combination give results that better fit experimental curves. This work focuses on such possibilities and shows that, as carriers are accelerated in an electric field, their velocity will begin to saturate when the electric field magnitude becomes significant. Such effects are observed in low, high and inversion mobility models simulated in strain-Silicon devices. These effects are to be accounted for by reducing of the effective mobility. Furthermore, it is shown that charge carriers in semiconductors are electrons and holes and that, their numbers are controlled by the concentrations of impurity elements, i.e. doping concentration; for that reason doping concentration has great influence on carrier mobility. Carriers are able to flow more quickly in materials with higher mobility; since the speed of an embedded device is limited by the time it takes a carrier to move from one side to the other. Devices composed of materials with higher mobility are able to achieve higher speeds.

show abstract

Photoluminescence From Oxidized Macroporous Silicon: Nanoripples and Strained Silicon Nanostructures

Cited by 8 publications

References 31 publications

Negative differential resistance in Si nanostructure: role of interface traps

Negative differential resistance in Si nanostructure: role of interface traps

Origin of photo-enhanced hysteretic electrical conductance in nanostructured silicon-based heterojunction

Investigation of Carrier Mobility Degradation Effects on Mosfet Leakage Simulations

Contact Info

Product

Resources

About