Phase-Rotator-Based All-Digital Phase-Locked Loop for a Spread-Spectrum Clock Generator

Yang, Jaehyeok; Lee, Joon-Yeong; Lim, Sunjae; Bae, Hyeon‐Min

doi:10.1109/tcsii.2014.2356893

Cited by 8 publications

(4 citation statements)

References 7 publications

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“…It is derived such that chaotic frequency spreading scheme can generate a well-defined sequence which look like random and hence gives flexibility. The authors in [68], [85] implemented the technique that involves the use of the random space vector pulse width modulation (RSVPWM). The paper discussed the realization method of RSVPWM in a 32-Bit Single-Chip Microcontroller.…”

Section: Concept Of Random Carrier Frequency Modulationmentioning

confidence: 99%

A State-of-the-Art Review on Conducted Electromagnetic Interference in Non-Isolated DC to DC Converters

et al. 2020

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One of the most challenging and interesting field in power electronics is the ability to mitigate the Electromagnetic Interference (EMI). A natural source of EMI includes the atmospheric discharge/charge phenomena and extra-terrestrial radiation. Man-made source of EMI are line radiation, auto ignition, radio frequency interference and power lines. Suppression of EMI and enhancing the Electro Magnetic Compatibility (EMC) has become essential in high frequency power electronic converters. This review article is a one stop solution for new researchers and practitioners to understand about the effects of EMI and its suppression techniques in detail. INDEX TERMS Electro magnetic compatibility, electro magnetic interference, mitigation.

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Section: Concept Of Random Carrier Frequency Modulationmentioning

confidence: 99%

A State-of-the-Art Review on Conducted Electromagnetic Interference in Non-Isolated DC to DC Converters

et al. 2020

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“…Jaehyeok Yang et al proposed a spread-spectrum based clock generator [42]. The design utilizes two modulation profiles.…”

Section: Adpll For Security Control/ Power Operationsmentioning

confidence: 99%

An analysis of ADPLL applications in various fields

Rai¹,

Marimuthu²

2020

IJEECS

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<span>ADPLL is now an essential component in applications like wireless sensor networks, Internet of things, health care applications, agricultural applications, etc, and also due the requirement of digital implementation by the industries. ADPLL consists of a phase detector, loop filter and digital controlled oscillator. The conventional PLL and digital PLL used for frequency synthesis, clock recovery circuit and synchronization give imprecise performance with respect to reliability, speed, power consumption, noise, locking speed, cost, etc. ADPLL overcomes the drawbacks of conventional PLL and digital PLL. In this paper, different approaches followed in All Digital Phase Locked Loop (ADPLL) for various applications are reviewed and their performance is compared based on components, modulation functions, frequency range, power utilization etc. In addition, an ADPLL with wide tuning range and frequency resolution is designed and implemented using automatic placement and routing, time to digital converter, digital loop filter and ring based oscillator. The ADPLL outputs and the results are analyzed with micro wind tool. The design gives a frequency range from 1.0-5.5GHz with low power consumption and it can also be used for Clock generation applications. </span>

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“…Therefore, a multi-phase clock is useful for a receiver. Three useful methods for multi-phase outputs have been disused in [9,10,11]. First, the conventional scheme uses an inverter chain, which is easy to implement, but its operational frequency depends on the number of stages in the inverter chain [9].…”

Section: Introductionmentioning

confidence: 99%

“…First, the conventional scheme uses an inverter chain, which is easy to implement, but its operational frequency depends on the number of stages in the inverter chain [9]. The second method uses a phase interpolator [10], whose circuit improves the phase resolution. The third approach uses an oscillator with a k-stage sub-feedback loop to increase operational frequency and generate multi-phase outputs [11].…”

Section: Introductionmentioning

confidence: 99%

A 0.6-V 1.6-GHz 8-phase all digital PLL using multi-phase based TDC

Liu

Cheng

et al. 2016

IEICE Electron. Express

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This paper proposes an 8-phase all-digital phase-locked loop (ADPLL) for a low supply voltage application. The proposed multi-phase digitally controlled oscillator (MP-DCO) employs two sub-feedback loops at high operational frequencies. The proposed multi-phase-based time-to-digital converter (MP-TDC) uses the multi-phase scheme, which reduces its area, and uses a time amplifier to extend the timing resolution. With a low supply voltage, the DCO and the sense-amplifier based delay flip-flop (SA-DFF) use bulk-controlled techniques to improve the performance at high operational frequencies and setup/hold times, respectively. When the ADPLL output is 1.6 GHz at 0.6 V, the RMS and peak-to-peak jitters are 3.8 ps and 33.7 ps, respectively. The power consumption and core area are 9.1 mW at 1.6 GHz and 0.036 mm 2 in a 90 nm CMOS process, respectively. Thus, this clock generator is useful for low power systems.

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Phase-Rotator-Based All-Digital Phase-Locked Loop for a Spread-Spectrum Clock Generator

Cited by 8 publications

References 7 publications

A State-of-the-Art Review on Conducted Electromagnetic Interference in Non-Isolated DC to DC Converters

A State-of-the-Art Review on Conducted Electromagnetic Interference in Non-Isolated DC to DC Converters

An analysis of ADPLL applications in various fields

A 0.6-V 1.6-GHz 8-phase all digital PLL using multi-phase based TDC

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