Phase Predistortion of a Class-D Outphasing RF Amplifier in 90 nm CMOS

Fritzin, Jonas; Jung, Ylva; Landin, Per N.; Händel, Peter; Enqvist, Martin; Alvandpour, Atila

doi:10.1109/tcsii.2011.2164149

Cited by 27 publications

(29 citation statements)

References 13 publications

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“…To improve linearity and mitigate amplitude and phase mismatches between the signal branches, the supply voltages for the output stages (for amplitude mismatch) and the phases (for amplitude and phase mismatches) should be made adjustable [65].…”

Section: B Pa Classes and Architectures For High Output Powermentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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Abstract-This paper reviews the design of watt-level integrated CMOS RF power amplifiers (PAs) and state-of-the-art results in the literature. To reach watt-level output power from a single-chip CMOS PA, two main strategies can be identified: use of high supply voltage, and use of matching and power combination. High supply voltage limits are closely related to device design in the fabrication process. However, the maximum operating voltage can be improved by amplifier class selection, circuit solutions, and process modifications or mask changes. High output power can also be reached by the use of on-chip matching and power combination, commonly using on-chip transformers. Reliability often sets the limits for the PA design, and PA degradation mechanisms are reviewed. A compilation of state-of-the-art published results for linear and switched wattlevel PAs, as well as a few fully integrated CMOS PAs, is presented and discussed.

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Section: B Pa Classes and Architectures For High Output Powermentioning

confidence: 99%

A Review of Watt-Level CMOS RF Power Amplifiers

Johansson

Fritzin

2014

IEEE Trans. Microwave Theory Techn.

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“…Method B is often used in power amplifier predistortion [8], [9], [10], and is then also called Direct Learning Control (DLA). The quality of the inverse and the forward models are closely coupled, and two choices are available.…”

Section: System Inverse Estimationmentioning

confidence: 99%

Estimating models of inverse systems

Jung

Enqvist

2013

52nd IEEE Conference on Decision and Control

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Abstract-This paper considers the problem of how to estimate a model of the inverse of a system. The use of inverse systems can be found in many applications, such as feedforward control and power amplifier predistortion. The inverse model is here estimated with the purpose of using it in cascade with the system itself, as an inverter. A good inverse model in this setting would be one that, when used in series with the original system, reconstructs the original input. The goal here is to select suitable inputs, experimental conditions and loss functions to obtain a good input estimate. Both linear and nonlinear systems will be discussed.For nonlinear systems, one way to obtain a linearizing prefilter is by Hirschorn's algorithm. It is here shown how to extend this to the postdistortion case, and some formulations of how the pre-or postinverter could be estimated are also presented.

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“…With the improved speed of CMOS transistors, highly efficient switched PAs, like Class-D/E, have gained increased interest in polar modulation [1], [2] and outphasing [3]- [10]. In the outphasing amplifier, an input signal, s(t), containing both amplitude and phase modulation is divided into two constant envelope phase-modulated signals, s 1 (t) and s 2 (t), as in Fig.…”

Section: Introductionmentioning

confidence: 99%

Analysis of a 5.5-V Class-D Stage Used in $+$30-dBm Outphasing RF PAs in 130- and 65-nm CMOS

Fritzin

Svensson

Alvandpour

2012

IEEE Trans. Circuits Syst. II

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Abstract-This paper presents the design and analysis of a 5.5 V Class-D stage used in two fully integrated watt-level, +32.0 dBm and +29.7 dBm, outphasing RF Power Amplifiers (PA) in standard 130 nm and 65 nm CMOS technologies. The Class-D stage utilizes a cascode configuration, driven by an AC-coupled low-voltage driver, to allow a 5.5 V supply in the 1.2/2.5 V technologies without excessive device voltage stress. RMS electric fields (E) across the gate oxides and the optimal bias point, where the voltage stress is equally divided between the transistors, are computed. At the optimal bias point, the RMS E, the power dissipation of the parasitic drain capacitance of the common-source transistors, and the equivalent on-resistances are reduced by approximately 25 %, 50 %, and 25 %, compared to a conventional cascode (inverter) stage. To the authors' best knowledge, the Class-D PAs presented are among the first fully integrated CMOS outphasing PAs reaching +30 dBm and demonstrate state-of-the-art output power and bandwidth.

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Phase Predistortion of a Class-D Outphasing RF Amplifier in 90 nm CMOS

Cited by 27 publications

References 13 publications

A Review of Watt-Level CMOS RF Power Amplifiers

A Review of Watt-Level CMOS RF Power Amplifiers

Estimating models of inverse systems

Analysis of a 5.5-V Class-D Stage Used in $+$30-dBm Outphasing RF PAs in 130- and 65-nm CMOS

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