Phase-Locked Loop Based on Selective Harmonics Elimination for Utility Applications

Ama, Naji Rajai Nasri; Martinz, Fernando Ortiz; Matakas, Lourenco; Kassab, Fuad

doi:10.1109/tpel.2012.2195506

Cited by 46 publications

(25 citation statements)

References 27 publications

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“…The design of the PI compensator is based on the placement of this pair of poles to achieve desired value ranges of settling time ( s t ), damping factor (  ) and natural frequency ( n  ) for a second order system, by using the discrete root locus method, resulting in significant improvement of the settling time, compared to previous results [4], [5], [8], [9]. The proposed method can be applied for both single and three phase systems [12] and for variable grid frequency operation [13]. The experimental results show good agreement with the expected (analytical) settling times of a second order system.…”

Section: Introductionmentioning

confidence: 99%

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Digital Control For PLLs Based On Moving Average Filter: Analysis And Design In Discrete Domain

Komatsu¹,

Ama²,

Matakas³

2015

Eletrônica de Potência

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-Phase Locked Loops using phase detector based on a multiplier and a moving average low pass filter are computationally simple, and provide adequate attenuation for the multiplier generated harmonics, which are responsible for distortion at the output signal. They are a good choice for synchronizing power electronics converters connected to the grid. Previously published papers based on proportional-integral control and moving average filter present long settling times. This paper uses the exact model of the moving average filter by its discrete high order transfer function, and applies the discrete root locus method to impose the dominant closed loop poles in a region defined by desired performance specification. It leads to a significantly shorter settling time, when experimentally compared with other recent proposals in the literature. 1

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Section: Introductionmentioning

confidence: 99%

“…If v i contains even and odd harmonics, then f n =f 1 . Figure 2 presents the Synchronous Reference Frame three phase PLL (SRF-PLL) where the phase detector multipliers are within the abc/dq block [12]. SRF-PLL tracks the fundamental positive sequence of the input voltages.…”

Section: Introductionmentioning

confidence: 99%

Digital Control For PLLs Based On Moving Average Filter: Analysis And Design In Discrete Domain

Komatsu¹,

Ama²,

Matakas³

2015

Eletrônica de Potência

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“…Among the available PLL approaches in single-phase gridconnected power converters, such as the Enhanced PLL [17], the selective harmonics elimination [18] or the pq theory [19], the synchronously rotating reference frame (SRF) PLL is one of the most employed approaches. It applies the Park transformation and low-pass filter stage as PD and LF respectively.…”

Section: Introductionmentioning

confidence: 99%

An Efficient FPGA Implementation of a Quadrature Signal-Generation Subsystem in SRF PLLs in Single-Phase PFCs

Lamo

López

Pigazo

et al. 2017

IEEE Trans. Power Electron.

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Synchronization with the utility voltage is naturally carried out by a diode bridge stage in single phase active rectifiers, while an active synchronization is included in the control algorithms applied to modern bridgeless topologies. Sensorless line current rebuilding algorithms also need synchronization with the line voltage to compensate at least for part of the current estimation error. The PLL circuits employed in single phase AC-DC converters are reviewed and a new digital PLL algorithm, based on the synchronous reference frame, is proposed. It is implemented in a Field Programmable Gate Array (FPGA) to utilize the parallelism and superior time resolution. Considering a restricted frequency variation of the line voltage around the central frequency, the orthogonal signal is obtained by a discrete differential operator designed to ensure unity gain at the central frequency. Its performance, including the memory and computational cost, versus previously consolidated algorithms implemented in the same device is analyzed. Simulations and experimental results prove its suitable behavior in steady-state at different line frequencies and under line voltage and frequency transients.

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“…Repetitive Controller (RC) [3], [13]- [19], ReSonant Controller (RSC) [9], [20], [21], and hybrid controllers [3], [22]. There are also other control strategies which can selectively compensate the harmonic distortion by modifying the modulation schemes, as presented in [23]- [26]. The above IMP-based controllers offer relative accurate control of periodic signals as internal models of interested harmonics have been included into the control loop.…”

mentioning

confidence: 99%

Frequency Adaptive Selective Harmonic Control for Grid-Connected Inverters

Yang

Zhou

Wang

et al. 2015

IEEE Trans. Power Electron.

149

100

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In this paper, a Frequency Adaptive Selective Harmonic Control (FA-SHC) scheme is proposed. The FA-SHC method is developed from a hybrid SHC scheme based on the internal model principle, which can be designed for gridconnected inverters to optimally mitigate feed-in current harmonics. The hybrid SHC scheme consists of multiple parallel recursive (nk±m)-order (k = 0, 1, 2, . . ., and m ≤ n/2) harmonic control modules with independent control gains, which can be optimally weighted in accordance with the harmonic distribution. The hybrid SHC thus offers an optimal trade-off among cost, complexity and also performance in terms of high accuracy, fast response, easy implementation, and compatible design. The analysis and synthesis of the hybrid SHC are addressed. More important, in order to deal with the harmonics in the presence of grid frequency variations, the hybrid SHC is transformed into the FA-SHC, being the proposed fractional order controller, when it is implemented with a fixed sampling rate. The FA-SHC is implemented by substituting the fractional order elements with the Lagrange polynomial based interpolation filters. The proposed FA-SHC scheme provides fast on-line computation and frequency adaptability to compensate harmonics in gridconnected applications, where the grid frequency is usually varying within a certain range (e.g., 50±0.5 Hz). Experimental tests have demonstrated the effectiveness of the proposed FA-SHC scheme in terms of accurate frequency adaptability and also fast transient response.

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Phase-Locked Loop Based on Selective Harmonics Elimination for Utility Applications

Cited by 46 publications

References 27 publications

Digital Control For PLLs Based On Moving Average Filter: Analysis And Design In Discrete Domain

Digital Control For PLLs Based On Moving Average Filter: Analysis And Design In Discrete Domain

An Efficient FPGA Implementation of a Quadrature Signal-Generation Subsystem in SRF PLLs in Single-Phase PFCs

Frequency Adaptive Selective Harmonic Control for Grid-Connected Inverters

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