Periodic Small Signal Analysis of a Wide Class of Type-II Phase Locked Loops Through an Exhaustive Variational Model

Abstract

Phase-locked loops are important building blocks for several different applications. Modern design and implementation of these circuits is largely advantaged by a mixed analog/digital simulation approach since phase locked loops are stiff systems and a full analog representation is in general too large to simulate in reasonable time. Even though current algorithms, based on a mixed analog/digital representation, lead to models characterized by outstanding properties, they do not allow efficient simulations of important periodic and small signal features such as modulation/demodulation or noise effects. In this paper a novel, reliable and efficient method is proposed that overcomes those limitations and makes possible to evaluate both modulation/demodulation and noise effects in the widely adopted class of type-II phase-locked loop circuits based on a digital three-state phase-frequency detector.Index Terms-Noise analysis, periodic small signal analysis, phase-locked loops, variational model.

Hold-In, Pull-In, and Lock-In Ranges of PLL Circuits: Rigorous Mathematical Definitions and Limitations of Classical Theory

“…However, there are PLL-based circuits with nonsmooth or discontinuous PD characteristics (see, e.g. the sawtooth PD characteristic for PLL [6], the model of QPSK Costas loop [25], and some others [26]- [28]). In such a case care has to be taken of the definition of solutions, the linearization of the model and the analysis of possible sliding solutions (see, e.g.…”

“…(29) it is then said that cycle slipping has occurred. Note that, in general, Definition 4' need not mean that finally (after acquisition) condition (28) can not be fulfilled.…”

Survey of integrated‐circuit‐oscillator phase‐noise analysis

“…Maffezzoni also presented a nonlinear Floquet-analysis-based technique to obtain period and amplitude perturbations caused by either a small constant shift in circuit parameters or a small signal injection into a circuit node-the latter could also be adapted to infer the oscillator K ICO or perturbation projection vector [168]. Along similar lines, Bizzarri has proposed a technique to handle ideal digital latches by computing saltation matrices to correct for state variable discontinuities at latch switching points [145,193]. 30 For the Floquet eigenvector to be computed, most tools require that state variables (capacitor voltages/inductor currents) be continuous functions of those state variables.…”

Extension of the variational equation to analog/digital circuits: numerical and experimental validation

“…Recently, the proposed technique has been applied to a more complex class of analog/digital circuits (a wide class of type-II phase locked loops), and its results and performances have been compared with those deriving from both a macro-modeling approach and extensive transient mixed-mode time-domain simulations [17,18]. To 'prove' the effectiveness of the approach and the accuracy of the simulation results, we have implemented on a breadboard a relaxation oscillator that employs two digital ports.…”

“…For example, the rising and falling fronts of the output waveforms of the logic ports can be considered as 'instantaneous' and thus well modelled through the VERILOG or VHDL languages. Recently, the proposed technique has been applied to a more complex class of analog/digital circuits (a wide class of type-II phase locked loops), and its results and performances have been compared with those deriving from both a macro-modeling approach and extensive transient mixed-mode time-domain simulations [17,18]. Owing to the capability to efficiently simulate circuits described indifferently and at the same time at transistor level and using behavioural languages, the proposed method represents a novelty in the framework of mixed analog/digital circuit simulation.…”