2015
DOI: 10.1109/tcsi.2015.2476295
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Hold-In, Pull-In, and Lock-In Ranges of PLL Circuits: Rigorous Mathematical Definitions and Limitations of Classical Theory

Abstract: Abstract-The terms hold-in, pull-in (capture), and lock-in ranges are widely used by engineers for the concepts of frequency deviation ranges within which PLL-based circuits can achieve lock under various additional conditions. Usually only non-strict definitions are given for these concepts in engineering literature. After many years of their usage, F. Gardner in the 2nd edition of his well-known work, Phaselock Techniques, wrote "There is no natural way to define exactly any unique lock-in frequency" and "de… Show more

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Cited by 113 publications
(75 citation statements)
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“…It is shown that the use of default simulation parameters for the study of twophase PLL in MatLab and SIMULINK can lead to wrong conclusions concerning the operability of the loop, e.g. the pull-in (or capture) range (see discussion of rigorous definitions in [17], [18]). …”
Section: Accepted To Ieee 7th International Congress On Ultra Modern mentioning
confidence: 99%
“…It is shown that the use of default simulation parameters for the study of twophase PLL in MatLab and SIMULINK can lead to wrong conclusions concerning the operability of the loop, e.g. the pull-in (or capture) range (see discussion of rigorous definitions in [17], [18]). …”
Section: Accepted To Ieee 7th International Congress On Ultra Modern mentioning
confidence: 99%
“…Unlike several recent works where rigorous analyses are established for low order PLLs and PLLs with no integrators in the filters [10,12,16,34], the analysis presented in this paper is more general in the sense that not only it is applicable to both PLLs with analog mixer and XOR gate but also to PLLs without any order or type restriction. Unlike several recent works where rigorous analyses are established for low order PLLs and PLLs with no integrators in the filters [10,12,16,34], the analysis presented in this paper is more general in the sense that not only it is applicable to both PLLs with analog mixer and XOR gate but also to PLLs without any order or type restriction.…”
Section: Motivation and Contributionsmentioning
confidence: 99%
“…The tracking behavior as well as the stability of such a system is largely dependent on the phase detector (PD) characteristics. While this is convenient during the initial phases of modern PLL designs, the linear assumption of the PD is only valid when the phase difference between the output and input remains sufficiently small [9], [10]. While this is convenient during the initial phases of modern PLL designs, the linear assumption of the PD is only valid when the phase difference between the output and input remains sufficiently small [9], [10].…”
Section: Introductionmentioning
confidence: 99%
“…4 Next section demonstrates that simulation of two-phase Costas loop in SPICE with default simulation parameters may lead to wrong conclusions concerning the pull-in range and lock-in range (see rigorous definitions in Kuznetsov et al (2015b); Leonov et al (2015b)). …”
Section: Fig 2 Two-phase Costas Loopmentioning
confidence: 99%