1991
DOI: 10.1063/1.348716
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Performance of thin hydrogenated amorphous silicon thin-film transistors

Abstract: In this paper we have analyzed the influence of the mask channel length (LM) on the performance of the 55-nm-hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs), incorporating nitrogen-rich hydrogenated amorphous silicon nitride gate dielectric and phosphorus-doped microcrystalline silicon (n+μc-Si:H) source/drain (S/D) contacts. In our TFTs the n+μc-Si:H S/D contacts have a specific contact resistance around or below 0.5 Ω cm2. We have shown that in our TFTs a field-effect mobility and thresh… Show more

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Cited by 133 publications
(70 citation statements)
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“…2 This performance is already comparable with that of amorphous-silicon FETs. 3 However, there are still several important issues to be resolved, most of them being associated with grain boundaries and interfacial disorder in organic thin films. Indeed, currently these structural defects are the major factor which limits the mobility, 2,4 causes the dependence of the mobility on the gate voltage, 5,6 and results in the broadening of the on/off transition.…”
mentioning
confidence: 99%
“…2 This performance is already comparable with that of amorphous-silicon FETs. 3 However, there are still several important issues to be resolved, most of them being associated with grain boundaries and interfacial disorder in organic thin films. Indeed, currently these structural defects are the major factor which limits the mobility, 2,4 causes the dependence of the mobility on the gate voltage, 5,6 and results in the broadening of the on/off transition.…”
mentioning
confidence: 99%
“…The contact resistance provides a measure of the injection efficiency of carrier charges into the active layer of the OTFTs and characterizes the S-D electrodes/organic semiconductor interface. Several methods have been proposed to extract the contact resistance in OTFTs [16][17][18][19][20]. In our case the estimation of the contact resistance values was done using the transfer line method (TLM) [17][18].…”
Section: Contact and Channel Resistances In Cupc-tftsmentioning
confidence: 99%
“…Therefore, in the frame of the TLM method, the measured total resistance (R Tot ) of the device can be modeled as the sum of two series resistances as follows [17][18]:…”
Section: Contact and Channel Resistances In Cupc-tftsmentioning
confidence: 99%
“…A preliminary investigation of the quantitative role of the source/drain (S/D) contacts can nevertheless be conducted using a method developed for amorphous-semiconductor thin-film transistors with ohmic contacts: the Transmission Line Method (TLM). [25][26][27] This method models the S/D contacts and access regions by gate-voltagedependent series resistances. For OP-TFTs with non-ohmic S/D contacts, the calculated series resistance also depends on the source-drain voltage.…”
Section: Device Fabrication and Electrical Performancesmentioning
confidence: 99%
“…We should note that, in staggered OP-TFT structures (for instance top contact devices), we could also expect additional resistance contributions from the access regions between the S/D contacts and the conduction channel (access resistance). 25 In the OP-TFTs studied here, we expect the conduction channel to be created in the same plane as the source and drain electrodes, which should drastically reduce the access resistances. However, significant contact resistances can nevertheless degrade the OP-TFT performances, especially in the linear regime, i.e., at low V DS .…”
Section: Device Fabrication and Electrical Performancesmentioning
confidence: 99%