Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation

Arpinen, Tero; Salminen, Erno; Hämäläinen, Timo D.; Hännikäinen, Marko

doi:10.1155/2009/826296

Cited by 10 publications

(10 citation statements)

References 3 publications

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“…The approach aims at making an early evaluation of such systems based on their performance. Following the same approach, Arpinen et al [25] present a method to capture abstract performance model of streaming data RTES. The method exploits UML with the support of MARTE profile to model such systems and SystemC as a simulation environment to perform performance evaluations of such models.…”

Section: Related Workmentioning

confidence: 99%

Model-Driven Design of Network Aspects of Distributed Embedded Systems

Ebeid

Fummi

Quaglia

2015

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Design of distributed embedded systems is a challenging task and it requires raising the level of abstraction to overcome the complexity of the design. In particular, modeling languages and semantic specification are necessary to address network description at high level of abstraction. Starting from this abstraction view, model manipulation is needed to explore various design alternatives and code generation is required for their simulation. In this paper, we propose the use of unified modeling language diagrams combined with a formal computational model as a key solution to specify requirements, generate design alternatives, and code for simulation. This paper proposes a formal framework and supporting tools to represent the application requirements, the library of network components, the environment description, and the rules to compose them. The framework allows to generate code for design validation by simulation and provides back annotation mechanism of the simulation results to refine the original model. Index Terms-Modeling and analysis of real time and embedded systems (MARTE), network manipulation, network synthesis, simulation, SystemC/transaction level modeling (TLM), unified modeling language (UML).

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Section: Related Workmentioning

confidence: 99%

Model-Driven Design of Network Aspects of Distributed Embedded Systems

Ebeid

Fummi

Quaglia

2015

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…During application execution, architecture evolution comes from interpretation of such loads by the platform resources. Currently, academic approaches such as those presented in [2], [3], and [4] support these principles. Industrial frameworks such as Intel CoFluent Studio [5] and Mirabilis Visualsim [6] can also be cited.…”

Section: Related Workmentioning

confidence: 99%

A dynamic computation method for fast and accurate performance evaluation of multi-core architectures

Nours¹,

Postula²,

Bergmann³

2014

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014

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Postula, A.; Bergmann, N.W., "A dynamic computation method for fast and accurate performance evaluation of multi-core architectures," in Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1-6, 24- Abstract-Early estimation of performance has become necessary to facilitate design of complex multi-core architectures. Performance evaluation based on extensive simulations is time consuming and needs to be improved to allow exploration of different architectures in acceptable time. In this paper, we propose a method that improves the tradeoff between simulation speed and accuracy in performance models of architectures. This method computes during model execution some of the synchronization instants involved in architecture evolution. It allows grouping and abstracting architecture processes and this way significantly reduces the number of simulation events. Experiments show significant benefits from the computation method on the simulation time. Especially, a simulation speed-up by a factor of 4 is achieved in the considered case study, with no loss of accuracy about estimation of processing resource usage. The proposed method has potential to support automatic generation of efficient architecture models.

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“…Actually, co-design [2] is usually used as the http://asp.eurasipjournals.com/content/2013/1/153 design method for embedded systems. For example, the co-design approach MoPCoM [3] allows the use of generic unified modeling language(UML) tools based on the modeling and analysis of real-time and embedded systems (MARTE) standard [4]. In fact, the MoPCoM methodology is performed using three abstraction levels: abstract, execution, and detailed modeling levels (AML, EML, and DML, respectively).Whereas, we have to respect multiple design rules to build UML models for embedded systems in order to perform automatically VHDL (VHSIC hardware description language) code generation.…”

Section: Related Workmentioning

confidence: 99%

Parallel embedded processor architecture for FPGA-based image processing using parallel software skeletons

Chenini

Dérutin

Aufrère

et al. 2013

EURASIP J. Adv. Signal Process.

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Today, the problem of designing suitable multiprocessor architecture tailored for a target application field raises the need for a fast and efficient multiprocessor system-on-chip (MPSoC) design environment. Additionally, the implementation of image processing applications on MPSoC system will need to exploit the parallelism and the pipelining in algorithms with the hope of delivering significant reduction in execution times. To take advantage of parallelization on homogeneous MPSoCs and to reduce the programming effort, the proposed design methodology offers more opportunities for accelerating the parallelization of sequential processing image algorithms on pipeline architecture. Our approach provides rapid prototyping tool as a graphic programming environment (CubeGen). Further, it offers a set of parallel software skeletons as a communication library, providing a software abstraction to enable quick implementation of complex image processing applications on field-programmable gate array (FPGA) platform. The design of homogeneous network of communicating processor is presented from the hardware and software specification down to synthesizable hardware description. Then, we extend our approach to support more complex applications by implementing a soft multiprocessor for 'multihypotheses model-driven approach for road recognition' and show the impact of various configuration choices (hardware and software) to match the specific application needs. Using the images of a real road scene, the performance results of the road recognition algorithm on a Xilinx Virtex-6 FPGA platform not only achieve the desired latency but also further improve the tracking performance which depends mainly on the number of hypotheses.

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Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation

Cited by 10 publications

References 3 publications

Model-Driven Design of Network Aspects of Distributed Embedded Systems

Model-Driven Design of Network Aspects of Distributed Embedded Systems

A dynamic computation method for fast and accurate performance evaluation of multi-core architectures

Parallel embedded processor architecture for FPGA-based image processing using parallel software skeletons

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