Performance evaluation of tiling for the register level

Proceedings of the 12th International Conference on Supercomputing

Llaberia

Fernandez

et al. 1998

Tiling is a well-known loop transformation that can be used to exploit data reuse at the register level and to improve a program's ILP. Previous work on tiling and also commercial compilers are able to perform tiling for the register level in more than one dimension when the iteration space is rectangular. However, they either cannot handle or can only handle limited cases of non-rectangular iteration spaces. Nonrectangular iteration spaces 1 are commonly found in linear algebra algorithms or can arise as a result of applying previous transformations such as loop skewing. In this paper we present a new general algorithm to perform tiling for the register level in more than one dimension in both rectangular and nonrectangular iteration spaces. Our method uses index set splitting to distinguish loop nests that traverse boundary tiles of the tiled iteration space from loop nests that traverse nonboundary tiles. We evaluate our method using as benchmarks typical linear algebra algorithms having non-rectangular iteration spaces. Results measured on both ALPHA 21064 and MIPS R10000 machines show that our method achieves speedups in the range of 1.11 to 5.96 over commercial compilers and preprocessors able to perform optimizing code transformations. INTRODUCTIONModern processors issue multiple instructions per cycle to exploit instruction level parallelism (ILP) and use several memory levels to reduce the average memory access time. To achieve high performance in these processors, the compilers have to be able to exhibit a program's ILP and to increase data locality to take full advantage of the architecture and to minimize the data movement between different levels of the memory hierarchy. Being able to exploit data reuse at the register level is extremely important in today's superscalar microprocessors, since the register level directly feeds the processor functional units and, if the register level is not properly exploited, then the number of first level cache ports bounds processor performance. Much research has been devoted to exploit data reuse at the cache level 1 We refer as a "non-rectangular" iteration space to an iteration space defined by loops whose bounds are compositions (max or min) of affine functions of the surrounding loops iteration variables. This includes iteration spaces whose bounds are not parallel to the iteration space axes. [19], and also commercial compilers and preprocessors, either cannot handle or can only handle limited cases of non-rectangular iteration spaces. Tiling arbitrary nonrectangular iteration spaces is not generally considered because it is not trivial [19]. We note that unroll & jam can be applied in multiple dimensions and, in rectangular iteration spaces, it is the same transformation as register tiling. However, unroll & jam can only be applied to limited cases of non-rectangular spaces [2].In this paper we present a new general method to perform tiling for the register level that blocks in several dimensions of the iteration space, improving the performance of...

Section: Performance Resultsmentioning

confidence: 99%

Section: Performance Resultsmentioning

confidence: 99%

Section: Code Generationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A general algorithm for tiling the register level

Proceedings of the 12th International Conference on Supercomputing

Llaberia

Fernandez

et al. 1998

On the performance of hand vs. automatically optimized numerical codes

Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550)

Llaberia²,

Fernandez³

Self Cite

In this paper, we compare automatic-optimized codes against hand-optimized codes. The automatic-optimized codes have been generated using our own developed tool that implements compiler techniques proposed in our previous work. Our compiler techniques focus on applying multilevel tiling to non-rectangular loop nests. This type of loop nests are commonly found in linear algebra algorithms, typically used in numerical codes. As hand-optimized codes, we use two different numerical libraries: the BLAS3 library provided by the manufacturers and the RISC-BLAS library proposed in [8]. Results will show how compiler technology can make it possible for non-rectangular loop nests to achieve as high performance as hand-optimized codes on modern microprocessors. MotivationExisting compiler technology is oriented mostly towards simple numerical codes containing loop nests that describe rectangular iteration spaces [4][20] [22][24]. This is understandable since transformations are easy to apply on this type of loop nests. However, several linear algebra algorithms also contain complex loop nests defining non-rectangular iteration spaces and current commercial compilers are unable to restructure and optimize these types of codes.This fact has led many programmers to restructure their algorithms by hand to perform well on particular architectures, a situation that has led to machine-specific programs. Additionally, manufacturers have tried to minimize the complexity of writing optimized codes by providing numerical libraries that attain high performance under their particular machine. The BLAS3 library [10], for example, provides a set of standard linear algebra operations. On top of the BLAS standard interface, higher level library packages such as LAPACK [2] have been built. However, not all applications can take advantage of these libraries and there are many situations in which none of the routines provided can specifically solve the task at hand. We believe that restructuring a code should be the job of the compiler. Compilers should handle the machine-specific details required to attain high performance on each particular architecture.To illustrate how current commercial compilers achieve poor performance on non-rectangular loop nests, Fig. 1 shows the performance (in Mflop/s) obtained by the linear algebra problems SGEMM and STRMM, varying the problem size. SGEMM consists of a very simple rectangular loop nest, performing a rectangular matrix multiply while STRMM consists of a non-rectangular loop nest, performing also a matrix multiply but with one of the matrices being triangular. The circle curves show the performance obtained if we directly compile the codes using the f77 compiler with maximum level of optimization. The triangle curves show the performance obtained if we call the vendor-optimized BLAS3 library [10] to perform the operations. We can see how in non-rectangular loop nests (STRMM) current compilers achieve poor performance compared with the hand-optimized code provided by the BLAS3 library. By contrast, i...

A cost-effective implementation of multilevel tiling

IEEE Trans. Parallel Distrib. Syst.

Llaberia

Fernandez

2003

Self Cite

This paper presents a new cost-effective algorithm to compute exact loop bounds when multilevel tiling is applied to a loop nest having affine functions as bounds (nonrectangular loop nest). Traditionally, exact loop bounds computation has not been performed because its complexity is doubly exponential on the number of loops in the multilevel tiled code and, therefore, for certain classes of loops (i.e., nonrectangular loop nests), can be extremely time consuming. Although computation of exact loop bounds is not very important when tiling only for cache levels, it is critical when tiling includes the register level. This paper presents an efficient implementation of multilevel tiling that computes exact loop bounds and has a much lower complexity than conventional techniques. To achieve this lower complexity, our technique deals simultaneously with all levels to be tiled, rather than applying tiling level by level as is usually done. For loop nests having very simple affine functions as bounds, results show that our method is between 1.5 and 2.8 times faster than conventional techniques. For loop nests having not so simple bounds, we have measured speedups as high as 2,300. Additionally, our technique allows eliminating redundant bounds efficiently. Results show that eliminating redundant bounds in our method is between 2.2 and 11 times faster than in conventional techniques for typical linear algebra programs.