Performance Evaluation of Modern Network-on-Chip Router Architectures

Abstract

On chip interconnection networks simplify the challenges of integrating large number of processing elements. Routers are backbone of networks. Buffers and crossbar in router consumes significant area and power of network. They have huge impact on overall performance and cost of network. Dual Xbar router architecture combines buffered and bufferless feature to reduce buffer read/write energy with dual crossbars. While Switch folding technique introduced to reduce wire density and decrease muxes in crossbar by increasing resource utilization. In this paper, we propose Folded Dual Xbar architecture by combining the Dual Xbar and Folding technique in order to get advantages of both architectures. Performance of architectures is implemented and evaluated using OMNET++ platform by applying multiple traffic patterns under different load conditions. We further calculated buffered and bufferless events to estimate the reduction in buffer read/write energy. Simulation results shows that there is slight increase in throughput and reduction in buffer read/write energy by average 46% at high loads in proposed 2-Folded Dual Xbar as compared to conventional architecture. Proposed 3-Folded Dual Xbar results at least 16.6 % increase in throughput as compared to conventional architecture with 43-45% reduced buffer read/write energy but slight increase in crossbar. Throughput of 3-Folded Dual Xbar decreased only by 5-7% as compared to Dual Xbar with distributed wire density advantage..