Performance and Reliability of Au and Pt Single-Layer Metal Nanocrystal Flash Memory Under nand (FN/FN) Operation

Abstract

Abstract-In this paper, we report on the fabrication and reliability characterization of gold (Au) and platinum (Pt) single-layer nanocrystal (NC)-based Flash memory devices for NAND application. The devices are fabricated using a CMOS-compatible process flow with high-quality (low leakage and large breakdown) Al 2 O 3 as the control dielectric. The impact of processing conditions on the NC size, area coverage, and number density is also investigated. Large memory window (∼7.5 V for Au and ∼10 V for Pt) and good retention are observed for both Au and Pt NC devices. Excellent postcycling retention is also noted for Pt NC devices. Endurance characteristics are found to be of concern as maximum of only 1 × 10 3 and 4 × 10 3 cycles can be obtained for Au and Pt devices, respectively. Anneal-temperature-dependent gate leakage is observed in Au devices and is investigated using analytical methods. Diffusion of Au atoms from the NC into the gate dielectrics is seen which correlates to the electrical measurements. Postcycling retention and program/erase of Pt NC devices are shown to be good.Index Terms-Cycling endurance, Flash memory, memory window, metal nanocrystals (NCs), reliability failure, retention, transmission electron microscopy (TEM)/electron diffraction (EDX).

Detection of Charge Storage on Molecular Thin Films of Tris(8-hydroxyquinoline) Aluminum (Alq3) by Kelvin Force Microscopy: A Candidate System for High Storage Capacity Memory Cells

“…To the best of our knowledge, this storage capacity significantly exceeds any previously reported for molecular-or quantum dot-based memory devices. [4][5][6]11 In contrast to the KFM measurements showing electron storage in Alq 3 films, no electron storage was observed in the memory capacitors. This can be explained by the comparatively smaller energy barrier for electrons tunneling out of the Alq 3 lowest unoccupied molecular orbital into the Si conduction band as compared to the tunneling barrier for holes from Alq 3 highest occupied molecular orbital into Si valence band, as drawn in Figure 5c.…”

“…The number of electrons stored in the floating gate decreases with each new technology node, while the defect-related charge leakage increases, with the consequence that oxide defects have an increasing impact on the cell operation as the size of memory cells is reduced. 1−3 One technological solution that can enable continued scaling of flash memory cells is to replace the conventional polysilicon floating gate by an array of segmented charge storage elements such as quantum dots (QDs), 4,5 molecules, 6 and dielectric traps, as has been done for the SONOS flash memory technology. 7,8 The discrete charge storage in such a nanosegmented floating gate inhibits charge transport between the nanosegments, limiting the impact of any given tunnel oxide defect to the charge stored in the proximity of that defect site.…”

“…9−11 As shown in our previous work, 6 a floating gate consisting of a thin film of molecules can provide several-fold higher density of charge storage sites than even the SONOS devices. 5,8,12 The low density of free carriers in molecular thin films and the high charge binding energy of individual molecules limit intermolecular interactions. The minimal overlap of electron wave functions between neighboring molecules contributes to the low thin film electron/hole mobilities typically observed in organic molecules, in the range from 10 −4 to 10 −9 cm 2 /V s. The low mobilities, which contribute to the immunity of stored charge to structural defects, are present in neighboring areas of the device.…”

Performance and Reliability Study of Single-Layer and Dual-Layer Platinum Nanocrystal Flash Memory Devices Under NAND Operation

“…Less than 5 V of memory window was typically reported for SL metal NC devices [7], [8], [17], [20]- [22]; though the use of a metal NC has been shown to have improved both the memory window and retention over semiconductor NC devices [18], [19]. In author's previous work on SL, Pt NC devices [23], a large memory window (∼10 V), and excellent retention were reported by optimizing the NC process flow to achieve a large NC number density (> 3 × 10 12 cm −2 , compared to < 1 × 10 12 cm −2 in most prior works) and area coverage (∼30%). The average NC size was observed to be 3-4 nm, which is smaller than ∼5 nm reported previously.…”

Nonvolatile Memory Characteristics of WSi2 Nanocrystals Embedded in SiO2 Dielectrics

“…The metallic property of metal-silicide nanocrystals provides them with * Author to whom correspondence should be addressed. a large charge storage capacity and a long retention time 11 while their silicide property provides them with good thermal stability. Therefore, metal-silicide nanocrystals have been studied for their possible use as the charge storage nodes of NFGM devices due to their metallic property and thermal stability.…”