Performance and Reliability Impacts of Extended Epitaxial Defects on 4H-SiC Power Devices

Abstract

This work explores the effects of extended epitaxial defects on 4H-SiC power devices. Advanced defect mapping techniques were used on large quantities of power device wafers, and data was aggregated to correlate device electrical characteristics to defect content. 1200 V class Junction Barrier Schottky (JBS) diodes and MOSFETs were examined in this manner; higher voltage 3.3 kV class devices were examined as well. 3C inclusions and triangular defects, as well as heavily decorated substrate scratches, were found to be device killing defects. Other defects were found to have negligible impacts on device yield, even in the case of extremely high threading dislocation content. Defect impacts on device reliability was explored on MOS-gate structures, as well as long-term device blocking tests on both MOSFETs and JBS diodes. Devices that passed on-wafer electrical parametric tests were found to operate reliably in these tests, regardless of defect content.

Defect Inspection Techniques in SiC

“…In MOSFET, BPDs increase on-resistance [91] and reduce the gate oxide reliability [92]. Micropipes limit the operation current and increase the leakage current [93,94] while defects such as SFs, carrots and polytype inclusions reduce blocking voltage [4,91] and scratches on the surface cause reliability issues [95]. Isshiki et al show that there are latent scratches, consisting of complex stacking faults and dislocation loops lying beneath the SiC substrate, resulting in formation of step bunching and degradation of dielectric strength of oxide film in SiC-MOSFETs [79].…”

Influence of interfacial energy on the growth of SiC single crystals from high temperature solutions

“…4,5 However, SiC crystals grown by PVT still contain a high density of defects, reducing the device yield and increasing the cost. [6][7][8] Therefore, producing SiC wafers with high-quality and low-cost is highly desired to achieve widespread adoption of SiC power devices. 3 Recently, solution growth techniques, especially top seeded solution growth (TSSG), have attracted great interest because of their decent potential to grow SiC single crystals free of micro-pipes, with a low density of other defects, from high temperature solutions (1700-2000 °C), which is conducted under conditions of close to thermal equilibrium.…”

Impact of crystalline defects in 4H-SiC epitaxial layers on the electrical characteristics and blocking capability of SiC power devices

“…This needs to be overcome in order to assure device performance close to its theoretical limits. There exist several studies already, which report on the effect of SiC structural defects on the reverse characteristics of SiC power devices, however, the level of impact was found to be quite application specific and strongly dependent on the operating requirements [5][6][7][8][9].…”

“…Among the first, threading dislocations (defects that propagate along the c-axis in [0001] crystallographic direction) like micropipes, threading screw and edge dislocations have been reported to impact the blocking capability of SiC devices. The majority of reports investigate the impact of those substrate defects mainly on Schottky barrier diodes (SBD) and p-n junction diodes (PNDs) [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19]. Micropipes were shown to cause pre-avalanche reverse-bias point failures in p-n junction devices, in already early studies [12].…”