Defect Inspection Techniques in SiC

Chen, Po-Chih; Miao, Wen‐Chien; Ahmed, Tanveer; Pan, Yii‐Wen; Lin, Chong; Chen, Shih-Chen; Kuo, Hao‐Chung; Tsui, Bing‐Yue; Lien, Der‐Hsien

doi:10.1186/s11671-022-03672-w

Cited by 29 publications

(19 citation statements)

References 142 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…The classical manufacturing issues which produces wafer defects mainly concern to failures, impurities or degradation of the production lines [27], [28]. For the work herein described, it is worth mentioning the case of Silicon Carbide (SiC).…”

Section: Methodsmentioning

confidence: 99%

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

et al. 2022

View full text Add to dashboard Cite

The recent increasing demand of Silicon-on-Chip devices has had a significant impact on the industrial processes of leading semiconductor companies. The semiconductor industry is redesigning internal technology processes trying to optimize costs and production yield. To achieve this target a key role is played by the intelligent early wafer defects identification task. The Electrical Wafer Sorting (EWS) stage allows an efficient wafer defects analysis by processing the visual map associated to the wafer. The goal of this contribution is to provide an effective solution to perform automatic evaluation of the EWS defect maps. The proposed solution leverages recent approaches of deep learning both supervised and unsupervised to perform a robust EWS defect patterns classification in different device technologies including Silicon and Silicon Carbide. This method embeds an end-to-end pipeline for supervised EWS defect patterns classification including a hierarchical unsupervised system to assess novel defects in the production line. The implemented "Unsupervised Learning Block" embeds ad-hoc designed Dimensionality Reduction combined with Clustering and a Metrics-driven Classification sub-systems. The proposed "Supervised Learning Block" includes a Convolutional Neural Network trained to perform a supervised classification of the Wafer Defect Maps (WDMs). The proposed system has been tested and validated on different datasets, showing effective performance in the classification of the defect patterns (average accuracy about 97%).

show abstract

Section: Methodsmentioning

confidence: 99%

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

et al. 2022

View full text Add to dashboard Cite

show abstract

“…Other defect characterization methods worth mentioning are photoluminescent mapping, X-ray topography or Raman spectroscopy. A more extensive overview can be found in [ 167 ].…”

Section: Silicon Carbide Materialsmentioning

confidence: 99%

Novel Photonic Applications of Silicon Carbide

Shi

et al. 2023

Materials

View full text Add to dashboard Cite

Silicon carbide (SiC) is emerging rapidly in novel photonic applications thanks to its unique photonic properties facilitated by the advances of nanotechnologies such as nanofabrication and nanofilm transfer. This review paper will start with the introduction of exceptional optical properties of silicon carbide. Then, a key structure, i.e., silicon carbide on insulator stack (SiCOI), is discussed which lays solid fundament for tight light confinement and strong light-SiC interaction in high quality factor and low volume optical cavities. As examples, microring resonator, microdisk and photonic crystal cavities are summarized in terms of quality (Q) factor, volume and polytypes. A main challenge for SiC photonic application is complementary metal-oxide-semiconductor (CMOS) compatibility and low-loss material growth. The state-of-the-art SiC with different polytypes and growth methods are reviewed and a roadmap for the loss reduction is predicted for photonic applications. Combining the fact that SiC possesses many different color centers with the SiCOI platform, SiC is also deemed to be a very competitive platform for future quantum photonic integrated circuit applications. Its perspectives and potential impacts are included at the end of this review paper.

show abstract

“…As described in Table 1 , the main purpose of the SiC post-CMP cleaning is to remove organic, metallic and abrasive contaminations resulting from the CMP process, so as to achieve high-quality epitaxial growth in the following step [ 36 ]. Owing to the chemical inertness of SiC, traditional post-CMP cleaning methods, such as RCA and sulfuric peroxide mix (SPM), whose working principles are based on oxidation followed by etching, become problematic.…”

Section: Post-sic Cmp Cleaningmentioning

confidence: 99%

Recent Advances In Silicon Carbide Chemical Mechanical Polishing Technologies

et al. 2022

View full text Add to dashboard Cite

Chemical mechanical polishing (CMP) is a well-known technology that can produce surfaces with outstanding global planarization without subsurface damage. A good CMP process for Silicon Carbide (SiC) requires a balanced interaction between SiC surface oxidation and the oxide layer removal. The oxidants in the CMP slurry control the surface oxidation efficiency, while the polishing mechanical force comes from the abrasive particles in the CMP slurry and the pad asperity, which is attributed to the unique pad structure and diamond conditioning. To date, to obtain a high-quality as-CMP SiC wafer, the material removal rate (MRR) of SiC is only a few micrometers per hour, which leads to significantly high operation costs. In comparison, conventional Si CMP has the MRR of a few micrometers per minute. To increase the MRR, improving the oxidation efficiency of SiC is essential. The higher oxidation efficiency enables the higher mechanical forces, leading to a higher MRR with better surface quality. However, the disparity on the Si-face and C-face surfaces of 4H- or 6H-SiC wafers greatly increases the CMP design complexity. On the other hand, integrating hybrid energies into the CMP system has proven to be an effective approach to enhance oxidation efficiency. In this review paper, the SiC wafering steps and their purposes are discussed. A comparison among the three configurations of SiC CMP currently used in the industry is made. Moreover, recent advances in CMP and hybrid CMP technologies, such as Tribo-CMP, electro-CMP (ECMP), Fenton-ECMP, ultrasonic-ECMP, photocatalytic CMP (PCMP), sulfate-PCMP, gas-PCMP and Fenton-PCMP are reviewed, with emphasis on their oxidation behaviors and polishing performance. Finally, we raise the importance of post-CMP cleaning and make a summary of the various SiC CMP technologies discussed in this work.

show abstract

Defect Inspection Techniques in SiC

Cited by 29 publications

References 142 publications

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

Novel Photonic Applications of Silicon Carbide

Recent Advances In Silicon Carbide Chemical Mechanical Polishing Technologies

Contact Info

Product

Resources

About