2015 10th European Microwave Integrated Circuits Conference (EuMIC) 2015
DOI: 10.1109/eumic.2015.7345077
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Performance and parasitic analysis of sub-micron scaled tri-gate AlGaN/GaN HEMT design

Abstract: AlGaN/GaN high-electron mobility transistors (HEMTs) with varied Tri-gate topologies have been fabricated and influences of the fin-shaped nano-channels on device parasitics are examined. Through S-parameter measurements and modelling of the designed Fin-FETs, a detailed RF investigation on intrinsic device parameters is performed under different biasing schemes. Corresponding RF performances and transfer characteristics as well as the derived small-signal parameters of the measured devices are extracted by em… Show more

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Cited by 10 publications
(5 citation statements)
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“…Compared to planar HEMTs, the influences of trigate C GS were also discovered to be more predominant than the ones of C GD with higher ratios between on-state and off-state capacitances. In addition, the influence of trigate channels on C DS is not critical, whereas the g ds strongly depends on the L Fin with a declining trend [154].…”
Section: Lateral Rf Finfets and Trigate Hemtsmentioning
confidence: 95%
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“…Compared to planar HEMTs, the influences of trigate C GS were also discovered to be more predominant than the ones of C GD with higher ratios between on-state and off-state capacitances. In addition, the influence of trigate channels on C DS is not critical, whereas the g ds strongly depends on the L Fin with a declining trend [154].…”
Section: Lateral Rf Finfets and Trigate Hemtsmentioning
confidence: 95%
“…Several groups [140,152,154] subsequently used smallsignal equivalent circuit modeling to understand the RF performance of GaN trigate/FinFET devices. Gate parasitics extracted at high V DS suggest that increasing V G has minimal effect on C GS of planar FETs, leading to a continuous decreasing trend of f T with a high slope.…”
Section: Lateral Rf Finfets and Trigate Hemtsmentioning
confidence: 99%
“…A recent study by Lee et al [15] has already shown that by adopting the Tri-gate topology, a more linear f T response can be achieved with respect to the varied gate bias voltage. It has been demonstrated in our previous study [18] that flatter Tri-gate f T can be also maintained throughout higher gate and drain bias voltages thanks to the reduced SCE and on-state gate capacitance lowering (relatively sharp reductions in intrinsic C gs with respect to increased gateand drain bias voltage). As seen in the intrinsic f T profiles extracted from the S-parameter measurements of the planar FETs in Fig.…”
Section: B Inalgan Tri-gate Hemtsmentioning
confidence: 88%
“…This is due to the adopted total gate width normalization with respect to the effective nano-channel widths, which neglects the parasitic effects. A more detailed analysis on the f T and parasitics of the Tri-gate devices has already been investigated in a previous study [18].…”
Section: B Inalgan Tri-gate Hemtsmentioning
confidence: 98%
“…Owing to its three-dimensional (3D) configuration, both top and sidewalls simultaneously deplete the gate region and therefore, better controllability is achieved compare to the planar HEMT. Indeed, recent studies have successfully fabricated E-mode FinFETs with fin widths below 100 nm [21][22][23][24]. This method is also preferred in applications where both E-and D-mode devices are on the same chip, as this can be achieved by adding a few fabrication steps compared to other normally-off HEMT methods.…”
Section: Introductionmentioning
confidence: 99%