Performance analysis of pre-equalized multilevel partial response schemes

Abstract

Abstract-In order to achieve high speed on electrical interconnects, channel attenuation at high frequencies must be dealt with by proper transceiver design. In this paper we investigate finitecomplexity MMSE pre-equalization under an average transmit power constraint, to compensate for channel distortion in the case of both full-response and precoded partial response signaling with L-PAM mapping, and consider the resulting error performance for symbol-by-symbol detection and sequence detection. For a representative electrical interconnect, we point out that the constellation size (2-PAM or 4-PAM), the type of signaling (full response or partial response), the detection method (symbol-bysymbol detection or sequence detection) and the number of preequalizer taps should be carefully selected in order to achieve satisfactory error performance at high data rates. For several scenarios, precoded duobinary 4-PAM is found to yield the best error performance for given average transmit power.

Equalization of multi-Gb/s chip-to-chip interconnects affected by manufacturing tolerances

“…The BER is obtained by following the derivation outlined in [17]. For a given H ch (f ), and assuming correct past decisions, the sample u(k) from (2) can be decomposed as…”

“…In order to take the constraint (1) into account, we consider the unconstrained minimization of the Lagrangian MSE cond + λh T pr R tr h pr over (h pr , α), where MSE cond is given by (16) Premultiplying (17) with h T pr , multiplying (18) with α and subtracting the resulting equations, we obtain α 2 µ = λE s /σ 2 a or equivalently, λ = α 2 µ with µ = σ 2 ν /E s . Substituting this value of λ into (17) and solving for h pr yields (6). The value of α results from the constraint (1), yielding (5).…”