Performance analysis of different arbitration algorithms of the AMBA AHB bus

Conti, Massimo; Caldari, M.; Vece, Giovanni B.; Orcioni, Simone; Turchetti, Claudio

doi:10.1145/996566.996734

Cited by 14 publications

(9 citation statements)

References 13 publications

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“…In this experiment, 6 masters are put on a bus with the traffic behaviors shown in Table 2 [3,7]. For each type of master, we design a heavy-traffic master and a light-traffic master.…”

Section: Methodsmentioning

confidence: 99%

“…In this section, we briefly introduce several previous arbitration schemes [1][2][3][4]. 1) Static Priority:…”

Section: Previous Workmentioning

confidence: 99%

“…Arbitration algorithms commonly used for shared buses include Static Priority, Time Division Multiplexing (TDM), and Round-Robin [1][2][3][4]. Lottery is the arbitration algorithm proposed recently [5] with the advantages of (i) providing designers with good control over bandwidth allocation for each master, and (ii) providing a high-priority master with quite low transaction latency.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication

Chen

Lee

Huang

et al. 2006

Proceedings of the 2006 Conference on Asia South Pacific Design Automation - ASP-DAC '06

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In shared SoC bus systems, arbiters are usually adopted to solve bus contentions with various kinds of arbitration algorithms. We propose an arbitration algorithm, RT_lottery, which is designed to meet both hard real-time and bandwidth requirements. For fast evaluation and exploration, we use high abstract-level models in our system simulation environment to generate parameters for our configurable arbiter. The experimental results show that RT_lottery can meet all hard real-time requirements and perform very well in bandwidth allocation. The results also show that RT_lottery outperforms several commonly-used arbitration algorithms today.

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“…In this experiment, 6 masters are put on a bus with the traffic behaviors shown in Table 2 [3,7]. For each type of master, we design a heavy-traffic master and a light-traffic master.…”

Section: Methodsmentioning

confidence: 99%

“…In this section, we briefly introduce several previous arbitration schemes [1][2][3][4]. 1) Static Priority:…”

Section: Previous Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication

Chen

Lee

Huang

et al. 2006

Proceedings of the 2006 Conference on Asia South Pacific Design Automation - ASP-DAC '06

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show abstract

“…In AMBA, AXI and AHB are two kinds of high-performance protocols usually used in high-speed applications, while APB protocol is a low-speed and low-power one usually used in the connection with peripherals. In RTBus, due to the timeliness required by real-time tasks, AXI is used in the channels among high-performance devices, while APB is adopted for the transmission involving low-speed devices and peripherals to save power and area [4].…”

Section: Amba Protocolmentioning

confidence: 99%

Hard real-time bus architecture and arbitration algorithm based on AMBA

Ding

2015

2015 International Conference on Information and Communications Technologies (ICT 2015)

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Real-time processors are growly used in embedded applications. Considering that the time cost in data transfer among devices is much more than the time used for computation and operation, it's important to design a high-speed real-time bus structure in real-time systems. This paper offers a deep investigation to the characteristics of real-time systems as well as the basic structure of real-time processors and real-time buses. We designed a high-speed and time-predictable bus architecture called RTBus, where high-performance AXI protocol is employed. To accurately calculate the bus access time for master devices, a two-level real-time bus arbitration algorithm, which adopts the warning-line judgment mechanism and simulated annealing algorithm, is proposed for the operation of the RTBus. Finally, it is proved that RTBus provides a good solution to the conflicts when sharing resources in real-time processors.

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“…The arbiter allows the master the authority of using a bus depending on the priority scheme. [7] The decoder determines which IP will be selected. The two multiplexers 'Master2Slave' and 'Slave2Master' select the signals from the master and slave that are allowed by the arbiter and send them to the bus.…”

Section: A Ip Design Based On Amba Platformmentioning

confidence: 99%

Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization

Lee

Cho

2006

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems

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This paper presents an AMBA-based IP to perform the forward and inverse transform and quantization required in the H.264 video compression standard. The transform and quantization circuit was optimized for area and performance. The AHB wrapper was added to the circuit for the AMBA-based operation. The user of the IP can specify how long the bus may be occupied by the IP and also where the video data are stored in the external memory. The AMBA-compliant operation of the proposed IP was verified on the platform board with Xilinx FPGA and ARM9 processor. We fabricated an MPW chip using 0.25 tm standard cells to prove the correct operations on silicon.

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Performance analysis of different arbitration algorithms of the AMBA AHB bus

Cited by 14 publications

References 13 publications

A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication

A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication

Hard real-time bus architecture and arbitration algorithm based on AMBA

Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization

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