Performance Analysis of 4:1 Multiplexer with DTMOS Technique

Sheetal, .; Kumar, Arvind; Kandari, Ritu; Bharti, Surbhi

doi:10.1109/iot-siu.2019.8777465

Cited by 4 publications

(1 citation statement)

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“…They compared their designs with different supply voltages from 0.8 to 5 volts and inferred that the power consumption varied from 0.152 µW to 0.829 mW. Kumar et al [29] have proposed an nMOS 4X1 MUX using dynamic threshold MOS (DTMOS) technology with a 1 V supply and a 42.7 µW power consumption for low-power wearable device applications.…”

Section: Introductionmentioning

confidence: 99%

A 0.8 V, 14.76 nVrms, Multiplexer-Based AFE for Wearable Devices Using 45 nm CMOS Techniques

Tamilarasan,

Duraisamy,

Elangovan

et al. 2023

Micromachines

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Wearable medical devices (WMDs) that continuously monitor health conditions enable people to stay healthy in everyday situations. A wristband is a monitoring format that can measure bioelectric signals. The main part of a wearable device is its analog front end (AFE). Wearables have issues such as low reliability, high power consumption, and large size. A conventional AFE device uses more analog-to-digital converters, amplifiers, and filters for individual electrodes. Our proposed MUX-based AFE design requires fewer components than a conventional AFE device, reducing power consumption and area. It includes a single-ended differential feedback operational transconductance amplifier (OTA) and n-pass MUX-based AFE circuits which are related to the emergence of low power, low area, and low cost AFE-integrated chips that are required for wearable biomedical applications. The proposed 6T n-pass multiplexer measures a gain of −68 dB across a frequency range of 100 kHz with a 136.5 nW power consumption and a delay of 0.07 ns. The design layout area is approximately 9.8 µm2 and uses 45 nm complementary metal oxide semiconductor (CMOS) technology. Additionally, the proposed single-ended differential OTA has an obtained input referred noise of 0.014 µVrms, and a gain of −5.5 dB, while the design layout area is about 2 µm2 and was designed with the help of the Cadence Virtuoso layout design tool.

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Section: Introductionmentioning

confidence: 99%