PECVD oxide as intermediate film for wafer bonding: Impact of residual stress

Olbrechts, Benoit; Raskin, Jean‐Pierre

doi:10.1016/j.mee.2010.01.022

Cited by 7 publications

(6 citation statements)

References 32 publications

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“…It was found that a low RF power for PETEOS deposition resulted in relatively low mass density, modulus, and hardness of the deposited film, and corresponded to a relatively high bonding energy. Olbrechts and Raskin studied the variation of the residual stress in PECVD oxides with deposition conditions and post-deposition anneal treatment, and found that low residual stress was favorable for oxide wafer bonding [23]. Warner et al reported a much higher bonding energy by using silane-based low-temperature oxide (LTO) than TEOS oxide [24], however, with little fundamental understanding on this phenomenon.…”

Section: Introductionmentioning

confidence: 99%

Low-Temperature Oxide Wafer Bonding for 3-D Integration: Chemistry of Bulk Oxide Matters

Lin

Shi

Yao

et al. 2014

IEEE Trans. Semicond. Manufact.

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The effect of bulk chemistry of deposited oxide materials on the eventual wafer bonding energy was fundamentally studied. Although low-temperature silicon oxide (LTO) and tetraethyl orthosilicate (TEOS) exhibited the same bulk density, and nitrogen plasma generated a higher degree of surface activation for TEOS than LTO, using LTO as the bonding oxide resulted in a much higher bonding energy than TEOS. This was attributed to the relatively high percentage of hydrogen-bonded silanol groups in LTO, which pointed to the existence of fine defect areas in LTO that would better accommodate the water molecules generated later by the interfacial condensation reactions. A pre-bonding baking step was found favorable for LTO wafer bonding. Index Terms-3-D integration, wafer bonding.

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Section: Introductionmentioning

confidence: 99%

Low-Temperature Oxide Wafer Bonding for 3-D Integration: Chemistry of Bulk Oxide Matters

Lin

Shi

Yao

et al. 2014

IEEE Trans. Semicond. Manufact.

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“…[9][10][11][12] Measurement of refractive index and buffered hydrofluoric acid (BHF) etch rate are useful indicators of the LT-PECVD dielectric coating composition and stoichiometry, which can be influenced by deposition process parameters such as deposition temperature, radio frequency (RF) power, process gas composition, total flow, gas ratio, and system configuration. 11,13,14 A series of experiments were performed to examine the impact of thermal annealing on the LT-PECVD SiO 2 coating. This study demonstrated the need to thermally stabilize the SiO 2 coating by outgassing in conjunction with film stress reduction.…”

Section: Introductionmentioning

confidence: 99%

“…Postdeposition annealing of LT-PECVD coatings has previously been reported for stress relaxation, device electrical performance improvement, and high-yield wafer bonding. 9,[14][15][16] Thermal stabilization and forced outgassing of LT-PECVD SiO 2 have been employed to reduce contact-metal blister formation in the fabrication of SiO 2 /Pt/lead zirconate titanate (PZT)/Pt capacitors. 10 The impact of SiO 2 film stress and thermal-cycling-induced wafer bow changes was examined to understand the effect of wafer bowing on blister formation.…”

Section: Introductionmentioning

confidence: 99%

Dielectric Coating Thermal Stabilization During GaAs-Based Laser Fabrication for Improved Device Yield

Connors

Millsapp²,

Turner

2016

Journal of Elec Materi

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The quality and yield of GaAs-based ridge waveguide devices fabricated at MIT Lincoln Laboratory were negatively impacted by the random lot-to-lot appearance of blisters in the front-side contact metal. The blisters signaled compromised adhesion between the front-side contact metal, underlying SiO 2 dielectric coating, and semiconductor surface. A thermal-anneal procedure developed for the fabrication of GaAs slab coupled optical waveguide (SCOW) ridge waveguide devices stabilizes the SiO 2 dielectric coating by means of outgassing and stress reduction. This process eliminates a primary source of adhesion loss, as well as blister generation, and thereby significantly improves device yield. Stoney's equation was used to analyze stress-induced bow in device wafers fabricated using this stabilization procedure. This analysis suggests that changes in wafer bow contribute to the incidence of metal blisters in SCOW devices.

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“…One of the main issues in today MEMS structures is determination of the residual stress between the layers of a microplate. This residual stress is produced mainly by the thermal mismatching practically resulting from the deposition of different materials at different temperatures [15]- [17]. In [18], a membrane was manufactured of a weakly stressed quadruple stack.…”

mentioning

confidence: 99%

Extraction Method for the Residual Stress in Multilayer Microplates Under Large Deflection Based on Static Deflection Analysis

Changizi

Stiharu

Olbrechts

et al. 2015

J. Microelectromech. Syst.

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This investigation presents a method of extraction of the built-in stress in films grown by thin-film deposition or growing in microplate structures. Although thin-film deposition processes are well controlled, the stress values might significantly vary, reaching ±40% of the projected value. The assumption of variance yields more accurate solutions for the deflection than the values obtained by assuming the exact interlaminar stress yielded by the deposition process. The extraction method was used in conjunction with a gradient-based optimization method to evaluate the effective stress based on the response of the microplate to distributed load. The estimation of the deflection in the model versus the experimental method is based on static deflection matching. The estimation of root-mean-square error based on the proposed model was reduced to 0.38% versus the experimental evaluation, while the deflection resulting from the assumption of the nominal interlaminar stress yield errors of up to 40% versus experiments.[2014-0220]Index Terms-Finite element methods, measurement errors, nonlinear differential equations, optimization methods, pressure measurement, Stone equation.

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PECVD oxide as intermediate film for wafer bonding: Impact of residual stress

Cited by 7 publications

References 32 publications

Low-Temperature Oxide Wafer Bonding for 3-D Integration: Chemistry of Bulk Oxide Matters

Low-Temperature Oxide Wafer Bonding for 3-D Integration: Chemistry of Bulk Oxide Matters

Dielectric Coating Thermal Stabilization During GaAs-Based Laser Fabrication for Improved Device Yield

Extraction Method for the Residual Stress in Multilayer Microplates Under Large Deflection Based on Static Deflection Analysis

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