10th IEEE International NEWCAS Conference 2012
DOI: 10.1109/newcas.2012.6329061
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Passive voltage level shifters for analog signaling

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Cited by 2 publications
(2 citation statements)
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“…Layout diagrams and a wafter micrograph were provided. Measurement results of the voltage shifting levels agree well with theoretical values[32,49,52,53].…”
supporting
confidence: 81%
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“…Layout diagrams and a wafter micrograph were provided. Measurement results of the voltage shifting levels agree well with theoretical values[32,49,52,53].…”
supporting
confidence: 81%
“…To detect whether the peak amplitude of the output voltage of the transformer reaches its maximum or not, in each C tune tuning step, the input voltage of the voltage multiplier is shifted down by V m − V T by the passive negative voltage level shifter formed by C clamp and the MOS diode, as shown in Fig. 3.19 [49]. Let the total load capacitance of the MOS To accurately estimate the peak position, V eq needs to be small.…”
Section: Peak Detection and Self Tuningmentioning
confidence: 99%