Passi4: The next Technology for Passive Integration on Silicon

Dekker, Arnold J. den; Geelen, A. van; Wel, P. van der; Koster, R.; Rodenburg, Elise C.

doi:10.1109/ectc.2007.373914

Cited by 9 publications

(4 citation statements)

References 3 publications

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“…The micromachined MIM capacitor described in this paper is similar to the 3D capacitor technology named Passi4Ô in its concept, 4) but the etching process in this work is simpler and more cost-effective because standard low-cost Si wet etching has been used.…”

Section: Fabrication Of Quasi-3d Mim Capacitormentioning

confidence: 99%

“…While much effort is put on embedded capacitors throughout different SOP areas, such as laminated (MCM-L), ceramic (MCM-C), and thin-film-deposited (MCM-D) technologies, MCM-D shows the best suitability in terms of obtaining high capacitance density needed for decoupling in RF and millimeter wave applications. This can be attributed to the controllability of layer thickness and feature dimensions in MCM-D. 2) Although numerous studies have been performed on boosting up the decoupling capacitance density in silicon technology and some good results, such as a capacitance density as high as 6 -35 nF/mm 2 , have been published, [3][4][5] an embedded decoupling capacitor in a thin-film MCM-D platform has not clearly been reported to the authors' knowledge. The typical capacitance density and maximum available capacitance of embedded MIM capacitors implemented in an MCM-D substrate are 0.7 -0.9 nF/ mm 2 , and below 20 pF, respectively.…”

Section: Introductionmentioning

confidence: 99%

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Embedded Decoupling Capacitors up to 80 nF on Multichip Module-Deposited with Quasi-Three-Dimensional Metal–Insulator–Metal Structure

Maeng¹,

Jeon²,

Yoo³

et al. 2008

jjap

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Embedded capacitors with available capacitances up to $80 nF have been implemented on a thin-film multichip moduledeposited (MCM-D) substrate. By cost-effective silicon wet etching, a new metal-insulator-metal (MIM) structure named quasi-three-dimensional MIM capacitor has been realized. The groove structure formed by silicon wet etching increases effective capacitance area, thus enhancing capacitance density by 1.5 times. No additional mask or process step is required to form the groove structure since it is simultaneously patterned and etched with ground bumps that are for effective interconnection. The implemented capacitors have capacitances from 2 to 78 nF with a scalable density of 3.6 nF/mm 2 , indicating that they are excellent candidates for high-power decoupling application.

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Section: Fabrication Of Quasi-3d Mim Capacitormentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Embedded Decoupling Capacitors up to 80 nF on Multichip Module-Deposited with Quasi-Three-Dimensional Metal–Insulator–Metal Structure

Maeng¹,

Jeon²,

Yoo³

et al. 2008

jjap

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“…One of the examples is the 6" PASSI4 process of NXP Semiconductors [2]. This process consists of high ohmic Si substrates with high quality RF components such as Metal-Insulator-Metal (MIM) capacitors and thick metal inductors.…”

mentioning

confidence: 99%

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mentioning

confidence: 99%

RF Characterisation and Process Control for Passive Integration Components

Wel

Dijkhuis

Chanlo

et al. 2007

2007 Proceedings 57th Electronic Components and Technology Conference

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Passive integration technologies gain more and more interest for cellular applications due to the increasing demand for integration of functionality for cost, performance and size reasons [1][2][3][4]. One of the examples is the 6" PASSI4 process of NXP Semiconductors [2]. This process consists of high ohmic Si substrates with high quality RF components such as Metal-Insulator-Metal (MIM) capacitors and thick metal inductors. The process also includes a thick backside metal and through wafer interconnect (TWI) via holes for low inductive grounding. In addition, a high density decoupling capacitor and a resistor are available. The process results in an RF component (a sub-module) which is utilized in a stacked power amplifier (PA)/front end module (FEM) which also includes active control and RF power technologies [4].One of the main difficulties with such a passive technology is the characterization and process control. In an active process, the performance of the circuits or sub circuits during pre-testing is closely related to the end product performance. However, the relation between the performance of the sub-modules and the performance of the final module is not straightforward at all. In this paper we will show how we have solved this issue for the process release of PASSI4. Characterisation methodThe method we have adapted consists of several characterization and simulations steps.First, the components of PASSI4 will be characterized. This will be done by measuring the relevant DC and RF parameters. During process release we have used a specific mask set which contains test structures for all the components (MIM cap, through wafer interconnect via holes and inductors) in a ground-signal-ground (GSG) test structure configuration. This enables the full wafer mapping of all relevant RF and DC parameters for the components. The 6" wafers contain 75 reticle fields which can be automatically measured using a Cascade 12000 semi-automatic prober. These measurements enable comparison between the relevant DC and RF parameters for each component.The next step is measuring the PCM (Process Control Monitor) parameters. These are placed at 5 positions across the wafer. PCM measurements are always DC (or low frequency) and contain capacitance values for MIM caps, resistances for TWI vias and resistances for all metal layers used. In principle, the PCM parameters can directly be correlated to the DC parameters of the component test structures. When a correlation between the DC and RF parameters is made, the correlation between the RF parameters and the PCM parameters can also be determined.After the wafer is fully characterized, the wafer is sawn and the PASSI4 sub-modules for the final module are taken from 5 positions near the PCM fields. The final modules are assembled and characterized using load-pull RF measurements [5].Once all measurements are ready, the correlation between the final module and the sub-component behavior is determined using simulations. In these simulations, the values for the relevant parameters of...

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