Pascant: a partial scan and test generation system

Bhawmik, Sudipta; Lin, Chih-Jen; Cheng, K.-T.; Agrawal, Vishwani D.

doi:10.1109/cicc.1991.163995

Cited by 47 publications

(14 citation statements)

References 12 publications

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“…We added entropy analysis to spectral analysis because the entropy analysis uses structural (SCC) and functional (logic probabilities) information to select flip-flops [22]. The two analyses together will use both structural and functional analysis to improve the quality of the scan set.…”

Section: Resultsmentioning

confidence: 99%

“…The method tried to achieve a required test coverage with minimum overhead through the use of a modified path-oriented decision making (PODEM) automatic test pattern generation program [21]. Cheng and Agrawal [8] [22]. Chakradhar et al [7] solved the minimum feedback vertex set (MFVS) problem for partial-scan with branch-and-bound partitioning and pruning techniques using integer linear programming (ILP).…”

Section: B Partial-scan and Dftmentioning

confidence: 99%

“…Table 1 shows the number of flip-flops that were selected by different algorithms. Columns LR, Pa, Op, and PSCAN report data obtained from the Lee and Reddy [23], PAS-CANT [22], Opus [24], and PSCAN algorithms. Xiang and Patel [12] presented a multi-phase partial-scan algorithms (opscan and mpscan).…”

Section: B Partial-scan and Dftmentioning

confidence: 99%

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SPARTAN: a spectral and information theoretic approach to partial-scan

Khan

Bushnell

Devanathan

et al. 2007

2007 IEEE International Test Conference

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Section: Resultsmentioning

confidence: 99%

Section: B Partial-scan and Dftmentioning

confidence: 99%

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SPARTAN: a spectral and information theoretic approach to partial-scan

Khan

Bushnell

Devanathan

et al. 2007

2007 IEEE International Test Conference

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“…We compare our algorithm with three other state-of-the art methods: Lee and Reddy [9], Pascant [11] and Opus [5]. All three are heuristic approaches and do not guarantee an MFVS.…”

Section: Resultsmentioning

confidence: 99%

“…Several exact and heuristic methods have been proposed for this problem [8,9,10,11,12,13,14]. In this paper, we present a new exact algorithm.…”

Section: Introductionmentioning

confidence: 99%

An exact algorithm for selecting partial scan flip-flops

Chakradhar

Balakrishnan

Agrawal

1994

Proceedings of the 31st Annual Conference on Design Automation Conference - DAC '94

114

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We develop an exact algorithm for selecting flip-flops in partial scan designs to break all feedback cycles. The main ideas that allow us to solve this hard problem exactly for large, practical instances are -graph transformations, a partitioning scheme used in the branch and bound procedure, and pruning techniques based on an integer linear programming formulation of the minimum feedback vertex set (MFVS) problem. We have obtained optimum solutions for the ISCAS '89 benchmark circuits and several production VLSI circuits within reasonable computation time. For example, the optimal number of scan flip-flops required to eliminate all cycles except self-loops in the circuit s38417 is 374. This optimal solution was obtained in 32 CPU seconds on a SUN Sparc 2 workstation.

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Methods for Synthesizing Testable Sequential Circuits

Cheng

Agrawal

1991

At&T Technical Journal

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he researches new methods for VLSI testing, synthesis for testability, neural network applications, and parallel processing. He joined AT&T in 1978 with a B.Sc. from Allahabad University, (continued on page 86) AT&T TECHNICALJOURNAL • JANUARY/FEBRUARY 1!!91We present three approaches to designing testable sequential machines. (Testability, inthe present context, refers to the ability to generate tests. Testable synthesis guarantees high fault coverage byusing anautomatic test generator.) Inthefirst approach, we develop a partial scan method inwhich scan flip-flops are selected to break up the cyclic structure ofthe sequential circuit. Inthe second approach, we present a novel state assignment method that results in reduced feedback or pipeline-like structure. The third approach, also applicable to finite state machines, embeds a suitably designed test machine in the given specification before synthesis.AT&T TECHNICALJOURNAL • JANUARY (FEBRUARY 1991 (b) bolically represented unassignedbit. Similarly, the code for S· can be writtenas O·b '2·b '3 ••. b'k The state S ,. J J J J • IJ Biographies (continued) Allahabad, India; a BE in telecommunication engineering from the University of Rootkee, Rootkee, India; an ME in electrical communication engineering from the Indian Institute of Science, Bangalore, India; and a Ph.D. in electrical engineering from the

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Pascant: a partial scan and test generation system

Cited by 47 publications

References 12 publications

SPARTAN: a spectral and information theoretic approach to partial-scan

SPARTAN: a spectral and information theoretic approach to partial-scan

An exact algorithm for selecting partial scan flip-flops

Methods for Synthesizing Testable Sequential Circuits

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