Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization

Hierarchical Cross-Entropy Optimization for Fast On-Chip Decap Budgeting

“…where V * i,j denotes the voltage waveform at node i under current excitation at node j in the adjoint power supply network, andv i (t) denotes the time derivative of the voltage waveform at node i in the original power supply network [1]. Subsequently, the decap sensitivity for mitigating the total supply noise s i,all of all violated nodes with respect to the decap candidate c i at node i can be computed as follows:…”

“…where V * i,all represents the voltage waveform at node i obtained from the adjoint power supply network with unit step current excitations applied at all violated nodes, andv i (t) denotes the time derivative of the voltage waveform at node i in the original power supply network [1].…”

“…In other words, instead of using the absolute sensitivity values for decap budgeting, we can use the relative sensitivity information to assign the decap values within each circuit block. In comparison, the previous sensitivity-based optimization approaches, such as the nonlinear optimization-based [2] or the conjugate gradient (CG)-based methods [1], need to perform the adjoint analysis for each optimization iteration.…”

“…The optimization methods in [1]- [4] need to re-evaluate the sensitivity in each iteration, which may not be easily parallelized. On the other hand, the proposed SCE decap optimization algorithm can be efficiently parallelized on multicore-multi-GPU platforms.…”

“…To mitigate the risks brought by excessive power supply noise, a variety of techniques has been proposed in the past [1]- [5], which typically falls into the following two categories: power grid wire sizing and decoupling capacitor (decap) optimization/budgeting. With the aggressive technology scaling, decap budgeting methods are more popular.…”