Particle swarm optimisation driven low cost single event transient fault secured design during architectural synthesis

Sengupta, Anirban; Kachave, Deepak

doi:10.1049/joe.2016.0378

Cited by 3 publications

(5 citation statements)

References 33 publications

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“…As evident from the results indicated in in Table. 4.4, the proposed approach is capable of achieving tremendous speed boost compared to the PSO [42] and ABF [1] methodologies. The acceleration achieved is more than 90% while comparing IIR 3 variant, Auto regressive, DWT filters while it is more than 100% in case of Elliptic Wave and FIR filters.…”

Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 92%

“…However the method in [38] performs faster under select conditions of best and average cases whereas in worst case is same as exhaustive search due to exponential complexity of MDMKP [98]. Thus we discard the exhaustive search for comparison and choose the PSO [42] and ABF [1] for our comparative analysis in Table . 4.44.5 since they are the most recent DSE methodologies that closely compete with our domain in this article.…”

Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 99%

“…A summary of critical analysis benchmarking PSO [42] and ABF [1] with respect to GWO-DSE framework is outlined in Table . 4.4. As evident from the results indicated in in Table.…”

Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 99%

“…Furthermore ABF suffers from adaptive mechanisms such as resource clamping and step size clamping to handle boundary outreach problem during exploration which limits its search space outreach. Comparatively in [42] the PSO model accommodates less number of search variants which includes best, worst and average case tuples for each iteration, although this might be efficient momentarily it leads to the issue of optimal solution stuck in local minima. As observed from the speed boost percentage indicators of column 3 of Table . 4.5, the proposed GWO-DSE framework significantly outpaces in terms of acceleration compared both to its counterpart heuristic PSO methodology as well as ABF methodologies all the while delivering accurate resource configurations during DSE.…”

Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 99%

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A Delta diagram synthesis for IoT optimization with grey wolf driven multi-objective automation

Siddavaatam¹

2021

Preprint

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Today, Internet of Things (IoT) is a major paradigm shift that will mark an epoch in communication technology such that every physical object can be connected to the Internet. With the advent of 5G communications, IoT is in urgent need of optimized architectures that can efficiently support wide ranging heterogeneous multi-objective requirements of communication, hardware and security aspects. The optimization challenges are rooted in the technology and how the information is acquired and manipulated by this technology. My research in this thesis provides a description of compelling challenges faced by IoT and how to mitigate these challenges by designing resource-aware communication protocols, resource- constrained device hardware with low computing power and low-powered computational security enhancements. This thesis lays the foundation for optimizing these challenging IoT paradigms by introducing a novel Delta-Diagram based synthesizing model. The Delta- Diagram provides a road-map linking the behavioral and structural domains of a given IoT paradigm to generate respective optimizer domain parameters, which can be utilized by any optimizer framework. The fundamental part of the communication synthesizer is a mathematical model, developed to obtain the best possible routing paths and communication parameters among things. The ultimate aim of the entire synthesis process is to devise a design automation tool for IoT, which exploits the interrelations between different layer functionalities. This thesis also proposes a novel cross-layer Grey wolf optimizer for IoT, which outperforms some of the contemporary optimizer algorithms such as Particle Swarm, Genetic Algorithm, Differential Evolution optimizers in solving unimodal, multi-modal and composition benchmark problems. The purpose of this optimizer is to accurately capture both the high heterogeneity of the IoT and the impact of the Internet as part of delta diagram synthesis enabled network architecture. In addition, the Grey wolf optimizer for IoT plays a crucial role in design exploration of system on chip architecture for IoT device hardware. The results generated by the optimizer yielded the most optimum feasible solutions in the design space exploration process of the IoT.

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Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 92%

Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 99%

“…A summary of critical analysis benchmarking PSO [42] and ABF [1] with respect to GWO-DSE framework is outlined in Table . 4.4. As evident from the results indicated in in Table.…”

Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 99%

Section: Comparative Analysis With Contemporary Heuristic Approach and Abf Methodsmentioning

confidence: 99%

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A Delta diagram synthesis for IoT optimization with grey wolf driven multi-objective automation

Siddavaatam¹

2021

Preprint

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“…Research in [136] described a methodology based on automating DSE and loop unrolling factor using the high-level transformation during area-delay trade-off using the PSO. Using CDFG, [147][148][149][150][151][152][153][154][155] described approaches based on the k-cycle transient fault secured data path during the HLS. Bhuvaneswari [116] studied a multichromosome structure on a DFG to optimize delay, area, and power using several algorithms, including swarm intelligence and evolutionary algorithms.…”

Section: Swarm Intelligence Systemsmentioning

confidence: 99%

Development of Multiobjective High-Level Synthesis for FPGAs

Bulnes

Maldonado

Trujillo

2020

Scientific Programming

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Traditionally, the High-Level Synthesis (HLS) for Field Programmable Gate Array (FPGA) devices is a methodology that transforms a behavioral description, as the timing-independent specification, to an abstraction level that is synthesizable, like the Register Transfer Level. This process can be performed under a framework that is known as Design Space Exploration (DSE), which helps to determine the best design by addressing scheduling, allocation, and binding problems, all three of which are NP-hard problems. In this manner, and due to the increased complexity of modern digital circuit designs and concerns regarding the capacity of the FPGAs, designers are proposing novel HLS techniques capable of performing automatic optimization. HLS has several conflicting metrics or objective functions, such as delay, area, power, wire length, digital noise, reliability, and security. For this reason, it is suitable to apply Multiobjective Optimization Algorithms (MOAs), which can handle the different trade-offs among the objective functions. During the last two decades, several MOAs have been applied to solve this problem. This paper introduces a comprehensive analysis of different MOAs that are suitable to perform HLS for FPGA devices. We highlight significant aspects of MOAs, namely, optimization methods, intermediate structures where the optimizations are performed, HLS techniques that are addressed, and benchmarks and performance assessments employed for experimentation. In addition, we show the analysis of how multiple objectives are optimized currently in the algorithms and which are the objective functions that are optimized. Finally, we provide insights and suggestions to contribute to the solution of major research challenges in this area.

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Fault-Tolerant DSP Core Datapath Against Omnidirectional Spatial Impact of SET

Kachave

Sengupta

2019

Can. J. Electr. Comput. Eng.

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Particle swarm optimisation driven low cost single event transient fault secured design during architectural synthesis

Cited by 3 publications

References 33 publications

A Delta diagram synthesis for IoT optimization with grey wolf driven multi-objective automation

A Delta diagram synthesis for IoT optimization with grey wolf driven multi-objective automation

Development of Multiobjective High-Level Synthesis for FPGAs

Fault-Tolerant DSP Core Datapath Against Omnidirectional Spatial Impact of SET

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