This paper describes a high-speed protection circuit against a hard-switching fault (HSF) and a fault under load (FUL). The demand for high-speed protection circuits for insulated-gate bipolar transistors (IGBTs) subjected to an HSF increases with increasing power density of power semiconductor devices. The reverse transfer capacitance of an IGBT depends on the collector-emitter voltage, such that it produces a significant effect on the switching behavior under HSF conditions as well as under normal conditions. Accordingly, a significant difference appears in the gate charge characteristics between under HSF conditions and under normal turn-on conditions. Hence, an HSF can be detected by monitoring the gate-emitter voltage and the amount of gate charge. IGBTs can be rapidly protected from destruction because no blanking time is required. An FUL can be also detected by the same protection procedure because a gate charge characteristic under FUL conditions also differs from that under normal turn-on conditions. Simulated and experimental results verify the validity of the novel protection circuit based on a gate charge characteristic.