Short-Circuit Protection Method Based on a Gate Charge Characteristic

Horiguchi, T.; Kinouchi, Shin‐ichi; Nakayama, Yasushi; Oi, Takeshi; Urushibata, Hiroaki; Okada, Shoji; Tominaga, S.; Akagi, Hirofumi

doi:10.1541/ieejjia.4.360

Cited by 5 publications

(3 citation statements)

References 10 publications

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“… Detection via V et makes possible fast SC detection even when current imbalance occurs between SiC‐MOSFET chips. In addition, the suppress block can suppress saturation current at di / dt exceeding its set value, thus securing protection margin when fast detection and protection are required. In previous methods using drain‐source voltage ( V DS ), 13,14 gate‐source voltage ( V GS ), 15 and gate charge ( Q G ), 16 it was difficult to quantitatively design current detection level ( I Dsc ) at SC occurrence because these physical quantities used for detection do not correspond uniquely to drain current (SC current). In the proposed method, I Dsc can be designed arbitrarily using the di / dt integration block.…”

Section: Proposed Methodsmentioning

confidence: 99%

“…2. In previous methods using drain-source voltage (V DS ), 13,14 gate-source voltage (V GS ), 15 and gate charge (Q G ), 16 it was difficult to quantitatively design current detection level (I Dsc ) at SC occurrence because these physical quantities used for detection do not correspond uniquely to drain current (SC current). In the proposed method, I Dsc can be designed arbitrarily using the di/dt integration block.…”

Section: Detection Via V Et Makes Possible Fast Sc Detection Evenmentioning

confidence: 99%

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Fast short‐circuit protection under current imbalance condition for multi‐paralleled SiC‐MOSFETs

Suzuki

Funaki

2023

Electrical Engineering Japan

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This paper proposes methodology and gate drive circuit that can immediately detect short-circuit (SC) of multiparalleled SiC-MOSFETs even under current imbalance condition. Proposed method detects SC current using an integration circuit that can sense di/dt. The detection level of SC current can be adjusted to a desired value regardless of the number of SiC-MOSFETs connected in parallel. The effectiveness of the proposed approach was experimentally validated for four-paralleled SiC-MOSFETs under extreme current imbalance in SC condition. SC was detected within 0.5 μs and all SiC-MOSFETs were protected without destruction at most 2.2 μs after the onset of SC, for all types of SC 1, 2, and 3.

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Section: Proposed Methodsmentioning

confidence: 99%

Section: Detection Via V Et Makes Possible Fast Sc Detection Evenmentioning

confidence: 99%

Fast short‐circuit protection under current imbalance condition for multi‐paralleled SiC‐MOSFETs

Suzuki

Funaki

2023

Electrical Engineering Japan

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“…With a constant threshold level, the detection will simply be a matter of integrated block design to obtain the gate charge Q g [ [15][16] ].…”

Section: Hard Switch Faultmentioning

confidence: 99%

Comparison between ig integration and vgs

Barazi

Rouger

Richardeau

2021

Mathematics and Computers in Simulation

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This study presents and compares two original high-speed protection circuit methods, namely, i g integration and v gs derivation, against short-circuit types, referred to as, the hard switch fault and fault under load. Since the gate-drain capacitor C gd of a power device depends on the drain to source voltage v ds , it can become an original native sensor to monitor the switching operation and so detect the unwanted v ds transition or the absence of the v ds transition by monitoring only v gs . The use of only low-voltage monitoring, such as v gs , is an essential step to integrate fast and embedded new detection methods into a low-voltage application-specific integrated circuit gate driver, in particular for wide bandgap power transistors. The C gd capacitor plays a major part in the two detection methods. The first method is based on dedicated two-dimensional monitoring of the gate charge transferred in a time interval combined with gate voltage monitoring. The second method consists of the reconstruction of the dv gs /dt by means of a capacitive current sensing to provide the v gs derivation combined with the v gs monitoring. Comparison and simulation of the methods based on a C2M0025120D SiC MOSFET device under LTspice™ are made to verify the validity of the methods. In terms of detection speed of the short circuit, a detection time of 200 ns is obtained for both methods. Experimental waveforms based on C3M0120090J SiC MOSFET device were included into LTspice TM to push furthermore the methods to their limits and validate the approaches. Both methods are easy to design and to integrate. However, the robustness and the speed of detection trade-off of all these methods should be analysed and compared relative to the critical functionalities.

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Ensuring a Reliable Operation of Two-Level IGBT-Based Power Converters: A Review of Monitoring and Fault-Tolerant Approaches

Liu

Yang

et al. 2020

IEEE Access

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Despite the emerging multi-phase and multi-level converters, two-level insulated gate bipolar transistor-based power converters are still widely used in industrial applications in nowadays. Thus, its reliability is of significant importance for ensuring industrial safety. In this paper, a review of the possibilities to ensure the reliable operation of these power converters is presented. The possible approaches are categorized into two groups: condition monitoring and fault-tolerant control. The former approach performs the monitoring methods of power converters, which enables the identification of device degradation to be realized. Accordingly, the mechanisms, indicators, and measuring methods of degradation are demonstrated in this paper to assist the design of condition-based maintenance. In contrast, the latter approach is a postfault one, where power converters remain the operation by activating the fault-tolerant units after faults are identified. For this approach, fault detection, fault isolation, and tolerant strategies are essential. Finally, the performance and cost-effectiveness of the two categories are discussed in this paper. INDEX TERMS Two-level power converter, reliability, condition Monitoring, fault tolerance, renewable energy application, insulated gate bipolar transistor.

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Short-Circuit Protection Method Based on a Gate Charge Characteristic

Cited by 5 publications

References 10 publications

Fast short‐circuit protection under current imbalance condition for multi‐paralleled SiC‐MOSFETs

Fast short‐circuit protection under current imbalance condition for multi‐paralleled SiC‐MOSFETs

Comparison between ig integration and vgs

Ensuring a Reliable Operation of Two-Level IGBT-Based Power Converters: A Review of Monitoring and Fault-Tolerant Approaches

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