Package Parasitic Inductance Extraction and Simulation Model Development for the High-Voltage Cascode GaN HEMT

Liu, Zhengyang; Huang, Xiucheng; Lee, Fred C.; Li, Qiang

doi:10.1109/tpel.2013.2264941

Cited by 245 publications

(99 citation statements)

References 19 publications

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“…In addition, the extraction of the interconnection parasitic inductances of the PCB traces is implemented by an Ansoft Q3D Extractor finite-element analysis (FEA) simulation [34], [35]. Table I shows the parasitic inductances in the proposed analytical model.…”

Section: A Extraction Of Key Parametersmentioning

confidence: 99%

“…This is because the junction capacitances and trans-conductance of all the devices are difficult to maintain a high consistency with the data in the datasheet. In addition, the parasitic inductances include the self-inductances and the mutual-inductances, which are influenced by several factors, including the conductor position, current direction, and oscillation frequency [34], [35]. However, the current directions and oscillation frequency are …”

Section: B Verificationmentioning

confidence: 99%

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An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

Liang¹,

Zheng²,

Li³

2016

Journal of Power Electronics

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This paper derives an improved analytical model to estimate switching loss and analyze the effects of parasitic elements on the switching performance of SiC MOSFETs. The proposed analytical model considers the parasitic inductances, the nonlinearity of the junction capacitances and the nonlinearity of the trans-conductance. The turn-on process and the turn-off process are illustrated in detail, and equivalent circuits are derived and solved for each switching transition. The proposed analytical model is more accurate and matches better with experimental results than other analytical models. Note that switching losses calculated based on experiments are imprecise, because the energy of the junction capacitances is not properly disposed. Finally, the proposed analytical model is utilized to account for the effects of parasitic elements on the switching performance of a SiC MOSFET, and the circuit design rules for high frequency circuits are given.

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Section: A Extraction Of Key Parametersmentioning

confidence: 99%

Section: B Verificationmentioning

confidence: 99%

An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

Liang¹,

Zheng²,

Li³

2016

Journal of Power Electronics

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“…Through this comparison, it can be observed that surface mount package is effective to reduce the value of parasitic inductance while Kelvin connection (K) is able to decouple power loop with driving loop so that the source inductance is no longer the common source inductance. Unlikely to e-mode GaN devices, the cascode GaN device has much complex parasitic inductance distribution and the identification of the CSI is not straight-forward [23], [24]. In the first step, the CSI of the low-voltage Si MOSFET and of the high-voltage GaN HEMT are analyzed separately.…”

Section: B Packaging Influencementioning

confidence: 99%

Application of GaN Devices for 1 kW Server Power Supply with Integrated Magnetics

Lee¹,

Li²,

Liu³

et al. 2016

CPSS TPEA

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Abstract-In today's power electronics products, quality and reliability are given. Great emphases are placed on high efficiency, high power density and low cost. With recent advances made in gallium nitride power devices (GaNs), it is expected that GaNs will make significant impacts to all three areas mentioned above. Thanks to the absence of reverse recovery charge and smaller junction capacitances, the turnon loss of GaN is significantly reduced and Turn-off loss and driving loss are negligible, for the first time. These desired properties coupled with ZVS techniques will drastically reduce all switching related losses, thus enabling GaN to operate at a switching frequency more than ten times higher than its silicon counterparts. To illustrate the impact of GaN on efficiency, density and even design practice, a 1 kW server power supply is demonstrated which employs an interleaved CRM totem-pole PFC followed with an LLC resonant converter. Both operate beyond 1 MHz. All magnetic components are integrated into PCB with much reduced EMI noises, thus, only a simple onestage EMI filter is required. The system achieves a power density more than 150 W/in 3 , an efficiency above 96%, and much improved manufacturability with minimum labor content.

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“…Such models include a power loss estimation model; (4) a simple GaN power transistor model with temperature-and frequency-dependent inductor circuits, (5) which exhibited strong static characteristics; and a model considering detailed parasitic inductance and cascode capacitance. (6,7) Other models include one with turn-off resistance that was developed for sorting device uniformity. (8) The goal of all the aforementioned studies was to develop GaN FET models that are more practical than real power devices.…”

Section: Introductionmentioning

confidence: 99%

Comparing of Parasitic Capacitances on Packaged Cascode Gallium Nitride Field-effect Transistors

2018

Sensors and Materials

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In this work, we examined the electrical characteristics of laboratory-fabricated cascode gallium nitride field-effect transistors (GaN FETs) and analyzed their parasitic capacitances. The calculated results were in good agreement with the experimental results and showed that commercial GaN FETs have superior switching performance, whereas laboratory-fabricated GaN FETs require further improvement.

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Package Parasitic Inductance Extraction and Simulation Model Development for the High-Voltage Cascode GaN HEMT

Cited by 245 publications

References 19 publications

An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

Application of GaN Devices for 1 kW Server Power Supply with Integrated Magnetics

Comparing of Parasitic Capacitances on Packaged Cascode Gallium Nitride Field-effect Transistors

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