Overlay challenges in the era of high-NA

Weiss, Martin H.

doi:10.1117/12.2664960

Cited by 2 publications

(1 citation statement)

References 7 publications

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“…We can also determine stitch CD sensitivity to overlap Y errors from this graph. The overlay variation along slit X direction between High NA fields at stitching can be expected [10]. Overlap errors at stitch are related to this overlay variation.…”

Section: Aerial Image Interaction and Opc Strategiesmentioning

confidence: 86%

Overview of stitching for high NA: imaging and overlay experimental and simulation results

Davydova¹,

Look²,

Wiaux³

et al. 2023

Optical and EUV Nanolithography XXXVI

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An increased interest to stitching for High NA EUVL is observed; this is driven by expected higher demand of larger size chips for various applications. In the past a recommendation was published [1] to have 1-5 um band where no critical structures of a High NA layer would be allowed. In [2], we have introduced new insights on at-resolution stitching. In this publication, we present new experimental results obtained on NXE:3400B scanner. In the past we showed NXE feasibility results of vertical lines and contact holes stitching at relaxed resolution (40-48 nm pitch) in a single wafer location. In this study we evaluate stitching behavior through slit at more aggressive resolutions (P36 and P24 lines / spaces).We provide an overview of interactions in the stitching area such as aerial image interactions, absorber reflection, absorber to black border transition, black border vicinity impact and show corresponding experimental and simulations results. We formulate initial requirements for black border edge placement control and show performance of new masks. For stitching with low-n masks, we discuss using sub-resolution gratings to suppress the elevated mask reflectivity. We show rigorous simulations of stitched images, its sensitivity to overlay errors and propose mitigation mechanisms for OPC. Finally, an overview of stitching enablers will be described: from improved reticle black border position accuracy and absorber reflectivity control to mask resolution and OPC requirements.

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Section: Aerial Image Interaction and Opc Strategiesmentioning

confidence: 86%

Overview of stitching for high NA: imaging and overlay experimental and simulation results

Davydova¹,

Look²,

Wiaux³

et al. 2023

Optical and EUV Nanolithography XXXVI

View full text Add to dashboard Cite

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Towards improved semiconductor defect inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS

Chen,

Deforce,

De Ridder

et al. 2024

Metrology, Inspection, and Process Control XXXVIII

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Continuous progression of Moore's law brings new challenges in metrology and defect inspection. As the semiconductor industry embraces High-Numerical Aperture Extreme Ultraviolet Lithography (High-NA EUVL), there is a current industry-wide evaluation of this technology for potential pitch reduction in future nodes. One of the primary hurdles in implementing High-NA EUVL in High Volume Manufacturing (HVM) is its low depth of focus. Consequently, suppliers of resist materials are compelled to opt for thin resist and/or new underlayers/hardmask's. Experimental combinations of thin resist materials with novel underlayers and hardmask's seem to pose signal detection challenges due to poor Signal-to-Noise Ratio (SNR). In such a scenario, manual classification of these nano-scale defects faces limitations in terms of required time and workforce, and the robustness and generalizability of outcomes are also questionable. In recent years, vision-based machine learning (ML) algorithms have emerged as an effective solution for image-based semiconductor defect inspection applications. However, developing a robust ML model across various image resolutions without explicit training remains a challenge for nano-scale defect inspection. The goal of this research is to propose a scale-invariant Automated Defect Classification and Detection (ADCD) framework capable to upscale images, addressing this issue. We propose an improvised ADCD framework as SEMI-SuperYOLO-NAS, which builds upon the baseline YOLO-NAS architecture. This framework integrates a Super-Resolution (SR) assisted branch to aid in learning high-resolution (HR) features by the defect detection backbone, particularly for detecting nano-scale defect instances from lowresolution (LR) images. Additionally, the SR-assisted branch can recursively generate or reconstruct upscaled images (∼ ×2/×4/×8...) from their corresponding downscaled counterparts, enabling defect detection inference across various image resolutions without requiring explicit training. Moreover, we investigate improved data augmentation strategy aimed at generating diverse and realistic training datasets to enhance model performance. We have evaluated our proposed approach using two original FAB datasets obtained from two distinct processes and captured using two different imaging tools. Finally, we demonstrate zero-shot inference for our model on a new, originating from a process condition distinct from the training dataset and possessing different CD/Pitch characteristics. Our experimental validation demonstrates that our proposed ADCD framework aids in increasing the throughput of imaging tools (∼ ×8) for defect inspection by reducing the required image pixel resolutions.

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Overlay challenges in the era of high-NA

Cited by 2 publications

References 7 publications

Overview of stitching for high NA: imaging and overlay experimental and simulation results

Overview of stitching for high NA: imaging and overlay experimental and simulation results

Towards improved semiconductor defect inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS

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