Overcoming bit loss mechanism in self‐amplified multilevel silicon‐oxide‐nitride‐oxide‐silicon memory cell

Abstract

This work reports on the triple‐level NAND flash cell realized from self‐amplified (SA) double gate (DG) tunneling‐based silicon‐oxide‐nitride‐oxide‐silicon (T‐SONOS) memory device. Through calibrated simulations, we show that capacitive coupling between the front gate and back gate can be used to store eight states (or 3 bits), that is, from “000” to “111,” in a T‐SONOS memory device with the readable difference between each level at lower programming voltages. The performance of the multilevel T‐SONOS cell is compared with the inversion mode SONOS (I‐SONOS) multilevel cell. Results highlight that gate length (Lg) scaling from 100 to 25 nm significantly deteriorates the threshold voltage associated with the lower states in the I‐SONOS multilevel cell. However, highly stable eight states can be achieved in a multi‐level T‐SONOS cell at Lg = 25 nm. The results highlight the potential of SA T‐SONOS cell for designing multilevel memory cell arrays.

An organic ambipolar charge trapping non-volatile memory device based on double heterojunctions

“…However, there may be heterojunction effect, where the Fermi levels alignment causes the band bending and the built-in field that hinders or facilitates the injection of the carriers from the active layer to the charge trapping layer. The band bending and the built-in field caused by the energy level alignment has also been proved in organic heterojunctions, such as in Copper (II) 1,2,3,4,8,9,10,11,15,16,17,18,22,23,24,25-hexadecafluoro-29H,31Hphthalocyanine (F 16 CuPc)/ Copper (II) Phthalocyanine (CuPc) heterojunction [20], in Zinc Phthalocyanine (ZnPc)/ fullerene (C 60 ) heterojunction [21]. The band bending due to the Fermi-level alignment causes space charge regions that the charge accumulates at the heterojunction interface to form accumulation-type heterojunction, or charge depletes at the heterojunction interface to form depletion-type heterojunction.…”

“…where SONOS is an ameliorated device using nitride as the charge trapping layer, therefore, it potentially enables higher charge storage capability, and it gradually becomes the mainstream of Flash memory [9]. With the scale-down of the floating gate memory and thus improved integration density, single-electron memory has also been proposed using nanocrystal as the charge trapping layer, thus the Coulomb blockade effect is obtained, which supports single electron storage, and this type of memory shows potential applications [10].…”