2023
DOI: 10.1109/jeds.2023.3277796
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Over 10W/mm High Power Density AlGaN/GaN HEMTs With Small Gate Length by the Stepper Lithography for Ka-Band Applications

Abstract: This study reports AlGaN/GaN high-electron-mobility transistors (HEMTs) fabricated by the Stepper Lithography on a 4-inch wafer for Ka-Band applications. Small gate length (L G ) of 100 nm was achieved through a 2-Step Photolithography Process and the gate region of the AlGaN/GaN HEMT was defined by using two lithography steps to form gamma-shaped gates. The 4-inch AlGaN/GaN HEMT wafer demonstrated high electrical performance uniformity with respect to the maximum drain-source current density (I DSS ), the pea… Show more

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Cited by 3 publications
(4 citation statements)
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“…The RTA process was followed by the B 11+ ion implantation to define the active region of the devices. After the gate length (L g ) definition of 0.15 μm by the stepper using the 2-step photolithography process [ 12 ], the wafer was also uniformly dipped in a diluted HCl solution to remove native oxide layers before gate metal deposition [ 29 ]. Ni/Au was then deposited as the gate metal stack for Schottky contact formation and a 100 nm SiN X passivation layer was deposited using the plasma enhanced chemical vapor deposition (PECVD) for moisture protection [ 30 ].…”
Section: Methodsmentioning
confidence: 99%
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“…The RTA process was followed by the B 11+ ion implantation to define the active region of the devices. After the gate length (L g ) definition of 0.15 μm by the stepper using the 2-step photolithography process [ 12 ], the wafer was also uniformly dipped in a diluted HCl solution to remove native oxide layers before gate metal deposition [ 29 ]. Ni/Au was then deposited as the gate metal stack for Schottky contact formation and a 100 nm SiN X passivation layer was deposited using the plasma enhanced chemical vapor deposition (PECVD) for moisture protection [ 30 ].…”
Section: Methodsmentioning
confidence: 99%
“…The defined line patterns are parallel to the current flow and have widths of 1 Alignment marks were fabricated first on the epitaxial wafer during the OEP process. Four different OEPs of 1 µm lines, 3 µm lines, 1 µm holes, and 3 µm holes, respectively, were then defined and transferred to the wafer by the stepper photolithography system (stepper) [12]. There are two shapes among the four OEPs, the line patterns and the hole patterns.…”
Section: Methodsmentioning
confidence: 99%
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“…To take advantage of the stepper's benefits, different research works have been reported to further scale down the critical size on the basis of stepper by process improvement. Lee et al 21 reported a 100 nm gate length achieved by 2-step photolithography process, which needs 2 times exposure with strict requirement of the alignment. Ando et al 22 reported a 150 nm gate length using stepper with the help of thermal reflow process to reduce the lithographic opening.…”
mentioning
confidence: 99%