Output buffer design for low noise and load adaptability

A Low Noise CMOS Digital Output Interface Circuit

“…As we know, when a digital signal goes off a chip, a driving circuit is needed to drive the load, which includes the bonding PAD and wire in the package, the printed wire on the board, and the receiver [1][2][3][4][5]. The load off chip is so large compared to that insides, the output interface circuit is needed to be specially designed.…”

Configurable transmitter with de-emphasis scheme supporting wide range data rates

“…Parasitic components in package and substrate can cause system noises such as simultaneous switching noise (SSN) and reflection noise which can deteriorate the I/O circuit performances [3,4,5,6,7,8,9,10,11]. Moreover, with the increase of I/O frequency, inter-symbol interference (ISI) between successive signals caused by frequency dependent attenuation of transmission line are more pronounce and degrade signal integrity [11,12,13,14,15].…”

“…Paper [3,4,5,6] proposed the output drivers that are adaptable to various loads or applications. However, the driver's full-swing nature is restricting it from operating toward high data rates and is susceptible to reflection noise due to the nonlinear characteristics of output impedance.…”