Abstract:A digital CMOS output interface circuit is proposed, which lowers down the peak and lengthen the duration of the pulse of current supplied by the power supply to reduce the SSN (simultaneously-switching noise) effects. The simulation shows that the maximal SSN voltage of the proposed circuit is 331.5mV compared to 662.4mV of the traditional one.
Set email alert for when this publication receives citations?
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.