Optoelectronic device performance on reduced threading dislocation density GaAs/Si

Abstract

Material properties and performance of metamorphic optoelectronic integrated circuits grown by molecular beam epitaxy on GaAs substratesA technique for the heteroepitaxy of GaAs/Si films having reduced threading dislocation density is presented. The important attribute of this technique is the suppression of three-dimensional Volmer-Weber island formation during initial deposition. This suppression is achieved by deposition of a stoichiometric GaAs buffer layer by a migration-enhanced epitaxy technique on silicon at 348 K to a thickness greater than the ''monolithic thickness,'' h m . Subsequent GaAs films deposited by conventional molecular beam epitaxy on buffer layers of thickness greater than h m possess structural and optical characteristics that exceed those for state-of-the-art GaAs/Si layers: an x-ray full width at half maximum ͑FWHM͒ of 110 arcsec with a dislocation density at the film surface of 3ϫ10 6 cm Ϫ2 and a concomitant 4 K photoluminescence FWHM of 2.1 meV. The p-i-n structures suitable for use as light-emitting diodes ͑LEDs͒ that were grown on the reduced threading dislocation density GaAs/Si and by means of forward-and reverse-bias measurements, demonstrated an ideality factor of nϭ1.5, an increased reverse-bias breakdown electric field of 2.1ϫ10 7 V/m, and an intrinsic region resistivity of 4ϫ10 7 ⍀ cm for LEDs of increasingly smaller mesa size.

Spin Injection and Detection in Silicon

“…1(a). In particular, GaAs/Si heterojunctions displayed I-V characteristics of an ideal diode [14], and optical excitations were studied in GaAs LED's grown on Si [15]. In the second approach, shown in Fig.…”

Molecular-beam epitaxy of GaAs/Si(001) structures for high-performance tandem A III B V/Si-solar energy converters on an active silicon substrate

“…The best value of FWHM reported in the literature for GaAs/Si films with the thickness 4 µm is 2.1 meV [16].…”

“…For thicker GaAs/Si layers, various methods and techniques allowing the dislocation density in the near-surface region of the GaAs layer to be reduced to about 10 6 cm -2 have been developed. In the first place, it is thermal cycling [12,13] as well as low temperatures and growth rates at the initial stage of GaAs growth -the so-called two-step growth [14][15][16]. At the first stage, few nanometers (or tens of nanometers) of GaAs are grown at low temperatures.…”

Si/GaAs heterostructures fabricated by direct wafer bonding

“…A specific interest is focused on the fabrication of Si/III-V compound semiconductor heterostructures. The combination of high performance III-V compound semiconductor optoelectronic devices with the charge handling functionality of modern silicon circuitry would enable the fabrication of monolithically integrated optical interconnects which will increase considerably the speed of data processing and transmission [1]. Silicon is also an ideal supporting material for GaAs and other III-V compound semiconductors due to its superior mechanical strength, low weight, and high thermal conductivity [2].…”